Before anything, thank you very much Prof. Hajimiri for your lectures. I have learned a lot from them. In the Vt reference current source at time 19:13, i think the reference transistors in the nmos and pmos current mirrors should be interchanged. The current Vt/R is generated by the bottom loop. We want this to be our current at the left side for the deltavgs to cancel, so the pmos transistor at the right side should be the reference transistor of the upper pmos current mirror, and the nmos transistor at the left should be the nmos current mirror reference transistor. I did this in ltspice and the circuit worked after i interchanged the reference transistors.
00:02 Integrated circuit biasing techniques for replication and variation 02:08 MOSFET threshold voltage is temperature and supply voltage independent. 07:06 Biasing with W/L going to infinity generates a current proportional to threshold voltage divided by resistor. 09:22 Using a transistor to create isolation for negative feedback. 14:36 Biasing should be connected to a high impedance side to allow for isolation. 17:04 Using a diode-connected device to create a threshold voltage 21:35 Temperature dependence of VBE 24:03 Temperature dependency of biasing in semiconductor physics. 28:51 Generating a reference voltage with positive temperature coefficient 31:15 Floating mirror forces currents and voltages to be equal 36:30 Designing circuits to be independent of temperature and supply is important for consistent behavior. 38:44 Biasing with a reference branch for temperature-independent current source. Crafted by Merlin AI.
Wow - GREAT lecture. Where does this class come in the curriculum? I never had to take a course this good and I wish I had. We did the semiconductor physics, but it was much more of a physics class. The hands on applications you work in are just solid gold.
Dear Professor Ali, I like all your teachings, thank you very much. For the circuit shown at 8 minutes, it's not a negative feedback, thus the circuit won't work. It's a typical locking circuit: once triggered, it will be locked up. Usually, it's used as a high power switch. Nevertheless, you can use it as an example to teach students how to achieve a voltage source, but in reality, it does not work.
Thank you so much prof. My professor told me about this ckt(9:15) but he didn tell me how this circuit was created. You gave an awesome intuitive explanation for that. Hats off!!!! I'm wondering why these videos have less viewers!! Do you teach RFIC design? Can you tell me good references like videos and notes because without any idea of RFIC I tried reading Dr. Razavi's book but Im getting lot of doubts and Im not able to grasp the concepts very clearly.
at 9:43, also there is trick to make I= Vt/ R.. we can make diode connected (towards ground ) W/L high enough to have delta VGS low so its VGS is almost equal to Vt.. then above FETs gate is 2Vt+ Delta .VGS.. then source of other FET ( Resistor terminal ) is VT..is that right ?
I think there is a mistake in the topology of the MOS circuit @41' . The diode connected transistors in the "floating mirror" should be swapped as well as the top mirror diode connected should be swapped too otherwise the gate of the floater will not bias up. I might be wrong. Having said that, sir thanks a lot for your lessons that I am following with lot of pleasure. You are absolutely a very good teacher!
Sir why should we size the bipolar transistor that is connected to Resistor in the PTAT configuration? Is that to increase the transconductance of the bipolar to compensate for the resistance added in series?
Veb depends on Is. Is depends on area of BJT. So if area increases Vbe decrees. This is required as the voltage decrease by increasing area of BJT, Is drops across the resistor. At the both node of Floating mirror, voltage and current is same by same sizing of transistors. The left side Vbe should be same to right side of Vbe if there is no n.Is.
Hi prof. How to do Design a biasing current that is independent of power supply and temperature. The value of the output biasing current should be 25 x 10^-5 A Operating Conditions VCC: Min 2.7V, Typ 3.0V, Max 3.3V Temperature: Min -45°C, Typ 25°C, Max 125°C
This is not only science, this is art
Razavi and Hajimiri - all you need for a good analog education
Add Nagendra Krishnapura and Shanthi Pavan also to this list.
@@ecestories8816 Yes
Clark Nguyen
Before anything, thank you very much Prof. Hajimiri for your lectures. I have learned a lot from them.
In the Vt reference current source at time 19:13, i think the reference transistors in the nmos and pmos current mirrors should be interchanged. The current Vt/R is generated by the bottom loop. We want this to be our current at the left side for the deltavgs to cancel, so the pmos transistor at the right side should be the reference transistor of the upper pmos current mirror, and the nmos transistor at the left should be the nmos current mirror reference transistor. I did this in ltspice and the circuit worked after i interchanged the reference transistors.
00:02 Integrated circuit biasing techniques for replication and variation
02:08 MOSFET threshold voltage is temperature and supply voltage independent.
07:06 Biasing with W/L going to infinity generates a current proportional to threshold voltage divided by resistor.
09:22 Using a transistor to create isolation for negative feedback.
14:36 Biasing should be connected to a high impedance side to allow for isolation.
17:04 Using a diode-connected device to create a threshold voltage
21:35 Temperature dependence of VBE
24:03 Temperature dependency of biasing in semiconductor physics.
28:51 Generating a reference voltage with positive temperature coefficient
31:15 Floating mirror forces currents and voltages to be equal
36:30 Designing circuits to be independent of temperature and supply is important for consistent behavior.
38:44 Biasing with a reference branch for temperature-independent current source.
Crafted by Merlin AI.
Wow - GREAT lecture. Where does this class come in the curriculum? I never had to take a course this good and I wish I had. We did the semiconductor physics, but it was much more of a physics class. The hands on applications you work in are just solid gold.
Dear Professor Ali, I like all your teachings, thank you very much. For the circuit shown at 8 minutes, it's not a negative feedback, thus the circuit won't work. It's a typical locking circuit: once triggered, it will be locked up. Usually, it's used as a high power switch. Nevertheless, you can use it as an example to teach students how to achieve a voltage source, but in reality, it does not work.
Professor.. This is diamond...Thanks alot for the upload..
professor Hajimiri you are a rockstar!
Thank you so much prof. My professor told me about this ckt(9:15) but he didn tell me how this circuit was created. You gave an awesome intuitive explanation for that. Hats off!!!! I'm wondering why these videos have less viewers!! Do you teach RFIC design? Can you tell me good references like videos and notes because without any idea of RFIC I tried reading Dr. Razavi's book but Im getting lot of doubts and Im not able to grasp the concepts very clearly.
sir thank you for this valuable content love from india
at 9:43, also there is trick to make I= Vt/ R.. we can make diode connected (towards ground ) W/L high enough to have delta VGS low so its VGS is almost equal to Vt.. then above FETs gate is 2Vt+ Delta .VGS.. then source of other FET ( Resistor terminal ) is VT..is that right ?
I think there is a mistake in the topology of the MOS circuit @41' . The diode connected transistors in the "floating mirror" should be swapped as well as the top mirror diode connected should be swapped too otherwise the gate of the floater will not bias up. I might be wrong. Having said that, sir thanks a lot for your lessons that I am following with lot of pleasure. You are absolutely a very good teacher!
Thank you so much. It makes so much sense to me than I first learned it.
"And Murphy's law says it is probably gonna be temperature dependent" Hahaha!
@Ali Hajimiri Where can I find the derivation of those equation near 28:40? Thanks
in any solid state devices book, for example ben G streetman's solid electronic devices
This is so nice!! I learn a lot.
Sir why should we size the bipolar transistor that is connected to Resistor in the PTAT configuration? Is that to increase the transconductance of the bipolar to compensate for the resistance added in series?
Veb depends on Is. Is depends on area of BJT. So if area increases Vbe decrees. This is required as the voltage decrease by increasing area of BJT, Is drops across the resistor. At the both node of Floating mirror, voltage and current is same by same sizing of transistors. The left side Vbe should be same to right side of Vbe if there is no n.Is.
Really good explanation in bandgap reference！
hi prof, can u tell me how to make a circuit current that is independent of voltage and temperature, thx
Well, bandgap references produce such currents. Also see 134N.
Hi prof. How to do Design a biasing current that is independent of power supply and temperature.
The value of the output biasing current should be 25 x 10^-5 A
Operating Conditions
VCC: Min 2.7V, Typ 3.0V, Max 3.3V
Temperature: Min -45°C, Typ 25°C, Max 125°C
you want to generate a 250uA current source? contact me: gang.liu@analogti.com
Great