Видео

I understand the positive feedback. But is not there a way that circuit output not saturate rather sattles to intermediate voltages?

At 31:40, I thought that C_u should be connected between the gate and the drain, not the drain to ground.

@ 30:26 what about the current path through R1, as we only null the independent source?

why does he not talk about the probability density functions for the ensemble mean and variance/covariance?

"uz should never enter equations" -- While I see the point of that, technically it does enter the equation in the asymptotic gain formula because T/(T+1) is equal to -uy/(ux-uy) = -uy/uz. And, similarly, 1/(T+1) is equal to ux/(ux-uy) = ux/uz = 1-(-uy/uz). I think it's actually helpful to think this way too in order to get the full intuition behind the formulas

a little bit mistake at 58:15, the second segment of overall phase plot should be -90 degree,

thank you sir

This guy knows zip about transistors. No amplifier is purely resistive. There sre internal parasitic capacitors in transistors. He is saying he has a purely resistive amplifier and he wants to add capacitance to make it stable. All unmitigated BS. Anyone forced to listen to his yabba dabba mixed up understanding of transistor amplifiers is doomed to failure as an EE.

11:31 Could you please explain the purpose of the PMOS latch? Why is it necessary to include it in the design?

why does u(t) come after finishing the calculation ?

@37:53 does not make sense to me. Need to watch again to understand this lesson.

deep

I was nervous to watch this one where Hajimiri is outside the classroom, but I'm glad i watched it anyway. In the end it was painless, enjoyable, and beneficial.

Ali Hajimiri is a national treasure.

Awesome!

I really like the lectures of Ali Hajimiri. Nevertheless, I got some questions: In the according paper equation (21) and that shown in ruclips.net/video/wByzymJ0Ppc/видео.html are not equal (different by a factor of 2). Is it because of single- and double-sided spectra? Moreover, I get a little confused by the usage of S_phi. Sometimes it is used as the spectrum of Phi and sometimes as the PSD of Phi.

Holy fucking shit can this guy take a mucenex or something. Always sounds like he’s drowning in his own saliva.

Great great lecture! Thank you for sharing it for free, Professor. However, I do have one question. For the asymptotic transfer function, you mentioned that we can choose the input and output as the current and voltage for the same port so that we can calculate the port impedance. How is that different from Blackman's equation as I didn't see the H infinity in the Blackman's formula. Are they equivalent?

These videos in this playlist are great

I watched all videos from these lectures back in like 2017. Thank you for this so much. Please don't ever pull this away from youtube. These videos are a wonderful resource and you are good at explaining things.

9:30 Tau_z should be Rz*Cp (and not 1 over Rz*Cp)

Great stuff

so , the linear control system and signal and system is the prerequisite of this course ?

Time and Transfer Constant (TTC), how come no other books or professors teach this? It looks like a power tool, but I have to admit it's a little bit complex, need to practice a lot.

Impressive work! chic.caltech.edu/wp-content/uploads/2014/02/Final-Paper.pdf

the death by 1000(1024) cuts lol😂😂

Very simple cinpect

Thank you Professor 😊 Basic abilities of matrix + linear algebrab conpect

so beneficial sir

35:03 It should be R2/R3 not R1/R3 in front of logarithm there at Vout expression

Best explanation for pole-zero and high bandwidth amplifier design. At @1:08:11, that means I cannot replace the resistor R2 with a current source load, because the output impedance at this node increases a lot, which in turn kills my amplifier bandwidth.

why there is always an ugly 42:25 indian woman .. they need to reform the selection system.

@9:10 - @10:20 very important intuitive conclusion

I've been seeing the series from the beginning and understand well all of them until this video. The calculation of R_pi, Ru, R_theta, Gm, etc. is difficult to understand.

@47:00: The BTJ two-stage amplifier appears to be notably more complex when compared to the CMOS two-stage amplifier.

@45:50: Regarding Vbias, it can be approximated as the sum of Vce,sat (tail current source) and Vce,sat (differential input), plus Vbe (cascode npn), which totals to 0.3V + 0.3V + 0.7V = 1.3V. However, the three diode-connected branches sum up to about 2.1V (3 * 0.7V = 2.1V) above ground. Therefore, there exists a discrepancy. Wouldn't it be preferable to utilize only two diode-connected branches, which would bring it closer to Vbias by 1.4V?

@1:09:00 Good information: from stability perspective, it's good to have more gain on the 2nd stage of op-amp.

00:02 Op amps are building blocks with differential input and single-ended output. 02:24 Current mirror ratio determines gain and output resistance. 07:04 Op-amp input range is limited by supply voltage. 09:25 Operational amplifier design considerations for high and low voltages. 14:41 Common mode behavior of MOS transistors 16:48 Differences in gain for MOs devices 21:23 Adjusting the current for the differential pair 23:33 Choosing a moving voltage over a fixed voltage for common mode 27:51 Using a floating mirror to adjust threshold voltage. 30:25 Creating a reference branch to control current 34:56 Design considerations for operational amplifier properties 37:01 Op-Amp design involves trade-offs in transistor sizing and channel length. 40:53 Minimum channel length and its impact on device performance. 43:29 The importance of choosing the right W/L ratio for MOS Op-Amp design. 47:49 The video discusses various design examples of MOS Op-Amp 50:30 The input ranges for the op-amp design examples are being discussed. 54:40 Kassel folded cascode offers more gain due to current distribution 56:56 Telescopic cascode amplifiers can achieve high gains and differential outputs. 1:02:43 Cascode design has a voltage level problem. 1:04:54 Adding a follower to adjust voltages and the problem with supply voltage changes. 1:09:13 Invert the whole thing to create a more complete object 1:11:34 Design considerations for op-amp output stages Crafted by Merlin AI.

00:03 Reviewing bipolar stages and modeling behavior 02:12 BJT amplifier operation and the usefulness of PI model 06:49 Understanding the resistance seen looking into the terminals of a BJT transistor. 08:54 When the other two terminals are AC ground, the collector resistance and the resistance into the emitter need to be taken into account. 13:32 BJT transistors have three terminals with varying impedance levels. 15:59 Emitter degeneration linearizes the amplification process. 20:24 Analysis of BJT amplifier gain 22:35 Transistor gain depends on resistor values and alpha 26:26 Voltage gain is the ratio of total resistance in the emitter times alpha. 28:35 Understanding the balance between physical understanding and abstraction in circuit analysis. 32:39 BJT amplifier behavior in saturation region 35:11 Emitter degeneration affects the voltage and slope. 39:37 Emitter degeneration helps in transistor biasing 41:58 The concept of beta RM and reflection coefficient explained. 46:54 Emitter degeneration increases input impedance and decreases output impedance. 48:51 Determining the output resistance with inclusion of ro. 52:58 Calculating current division using BJT amplifier 55:41 Derivation of transfer characteristics and gain in BJT amplifier. 1:00:45 Emitter degeneration affects current division 1:03:08 Emitter degeneration in BJT amplifier Crafted by Merlin AI.

00:02 Op-Amp is a block with a differential input and a single-ended output. 02:18 Op-amp gain can be calculated using differential pair analysis. 04:55 The Op-Amp has a gain of 50 and an output impedance of 12.5 kilohms. 07:21 Using a transistor as a current source to make a basic op-amp. 09:44 Op-Amp design involves various components working together for signal conversion. 11:51 Design considerations for driving a load with an op-amp. 14:28 Op-Amp gain can be improved using cascode configuration. 16:41 Cascode current mirror improves output resistance and current matching. 19:15 Total gain is GM 1 times the output resistances of the components. 21:38 Biasing methods affect op-amp performance. 23:44 Designing a current source to feed the transistor. 25:59 Consider resistive load for efficient design Crafted by Merlin AI.

00:02 Integrated circuit biasing techniques for replication and variation 02:08 MOSFET threshold voltage is temperature and supply voltage independent. 07:06 Biasing with W/L going to infinity generates a current proportional to threshold voltage divided by resistor. 09:22 Using a transistor to create isolation for negative feedback. 14:36 Biasing should be connected to a high impedance side to allow for isolation. 17:04 Using a diode-connected device to create a threshold voltage 21:35 Temperature dependence of VBE 24:03 Temperature dependency of biasing in semiconductor physics. 28:51 Generating a reference voltage with positive temperature coefficient 31:15 Floating mirror forces currents and voltages to be equal 36:30 Designing circuits to be independent of temperature and supply is important for consistent behavior. 38:44 Biasing with a reference branch for temperature-independent current source. Crafted by Merlin AI.

Machallah professor your type of teaching is very unique and genius, Alahmdolilah that your in academia and not in the industry so the generations can access to this genius explanations

00:04 Integrated circuit biasing is different from discrete design biasing due to economic and device properties. 02:06 Integrated circuits benefit from close proximity and batch processing for better matching. 06:35 Relationship between different types of transistors and current mirrors 09:07 Current mirrors allow replication and scaling of a reference current. 14:06 Parallel operation of bipolar transistors led to sequential failure. 16:18 The base-emitter voltage (VBE) of a bipolar transistor has a reverse temperature coefficient. 20:46 Using transistor beta to reduce base current in multiple stages 22:54 Biasing and current mirrors are specific to certain types of devices. 27:22 Choosing between different transistor connections based on advantages and disadvantages 30:16 The key aspect of a good current source is high output impedance. 34:27 To effectively generate and copy currents, an arbitrary three-terminal device should be more sensitive to V21 than V31. 37:02 Output resistance and limitations of current sources 41:15 Design parameters control integrated circuit performance. 43:28 Creating complementary mirror with PNP transistors 47:24 Using White's Law current source to scale down current in integrated circuits. 49:38 The output current can be calculated using the difference of two logs. 54:13 Introduction to cascode and cascode current mirror 56:37 Explanation of integrated circuit biasing and current mirrors 1:01:29 Cascode output voltage 1:04:33 Addressing the challenge of reducing the voltage to 2 delta Vgs in MOSFET circuits. 1:09:46 Solving problems one step at a time Crafted by Merlin AI.

00:02 Concept of biasing and its qualities 01:59 Biasing techniques exploit exponential behavior for gain. 07:00 Temperature independent biasing concept 09:37 IC can be expressed as (VCC - VBE) / (RB + (re / beta)), showcasing dependence on beta and RB. 15:16 Choosing the value of RC for an amplifier 17:33 Basic biasing concepts for transistor circuits. 22:10 Biasing with resistors limits transistor gain. 24:21 Biasing techniques can reduce dependency on transistor specifics. 29:23 Common emitter and common source are essentially the same fundamental stage. Crafted by Merlin AI.

This guy is an excellent lecturer, instructor.

00:04 Advanced biasing techniques in integrated circuits 02:25 The Scaled bandage reference and adjustable voltage PVT independent references enforce similar currents and voltages. 08:07 Enforcing equal currents for substantially similar voltages. 10:21 Diode connection impacts voltage regulation. 15:39 Different configurations for VT reference 17:40 Adjustable voltage PVT independent references 21:39 Discussion on creating a constant voltage using adjustable voltage references. 24:13 The need for a stable solution in chip design. 28:23 Using op-amp for voltage equalization 30:44 Analyzing voltage references using equations 35:48 Voltage cancellation at 1.1 volts 37:48 Discussing the issue with the voltage and finding a solution 42:25 Generating a VT reference by dropping voltage across a resistor. 45:01 Explanation of scaling factor and voltage references 50:11 Adjustable voltage PVT independent references Crafted by Merlin AI.

00:02 Driving a resistive load is necessary for circuits to deliver energy. 02:10 Driver stages and output stages in amplifiers 06:53 Lowering voltage reduces current through the output stage. 09:12 The problem with driving an amplifier to push a speaker to full power 14:32 Class A amplifier operation and limitations 17:06 Combining current sink and source for effective operation 21:43 Understanding the need for a dead zone due to transistors' VBE on requirement. 24:00 Tug-of-war between currents in driver stages 28:42 Efficiency defined as power delivered to the load vs. DC power. 31:00 Power delivered to the transistor causes heat 35:41 Bipolar transistors have specific junctions and characteristics Crafted by Merlin AI.

5:02, I think there has been a mistake.

@23:00 One problem not mentioned in the BJT current mirror is the presence of the parasitic base resistor. The BJT that far away from the diode connected BJT, its base voltage is smaller due to the voltage drop across the parasitic resistor, and essentially the Vbe is smaller in contrast to the the nearest BJT whose Vbe is larger. Of course, this base voltage drop due to the parasitic resistance is very small due to the small base current and parasitic resistance. However, as the number of parallel connected BJT increases, and connecting another BTJ to provide the sum of all base currents @21:18, the voltage drop on base cannot be ignored as the current is proportional to the exponential of Vbe.

31:50, isn't it what we are trying to find whether or not there is right half plane pole of H(s)= A(s)/(1+T(s)) NOT of only 1 + T(s)? As far as I understand, numbers of RHP of H(s) = number of RHZ of 1 + T(s) = number of origin encirclements of 1+ T(s) assuming that T(s) itself is stable (no RHP) Is that correct?