2:30 let's suppose the bulk is at higher potential and D/S is at lower. Then what happens? the electrons from D starts moving from D to bulk? If yes then how it'll affect the working of CMOS
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Hi You can corelate this question with the explanation in the video. If you do this connection you create forward bias diodes . And we do not want to have leakage in this path. Hope this helps
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I've read lots of explanation of bulk connection, but I just understood it thanks to you! Great explanation
Thank you.
thank you very much sir, i had a hard time grasping why bulk had a connection to it
Very explained 😊
this was very well explained, straight forward. Thank you.
2:30 let's suppose the bulk is at higher potential and D/S is at lower.
Then what happens? the electrons from D starts moving from D to bulk? If yes then how it'll affect the working of CMOS
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Really good explanation. Thanks!
Well explained...
Good one! make more videos
Thank you for the explanation.
You are welcome!
well done
Thank you
What will happen when source connected to vdd ?
JUST WOW!!
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Thank you Sir
Most welcome
But usually the source of a transistor is also connected to gnd or vdd(depending if nmos or pmos), does that just cancel out?
Hi, i am not clear on your question. Can you elaborate on the "cancel out" term please. Thanks
Sir if connect pmos bulk at vss as well nmos bulk connect vdd what will happend
Hi You can corelate this question with the explanation in the video. If you do this connection you create forward bias diodes . And we do not want to have leakage in this path. Hope this helps
labyo
Hi, we have created a free first level course for Analog design engineers. Please do join and share your feedback.
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