At 5:33 If we apply positive potential on the body terminal wont it attract all the free electrons to the body terminal; wouldn't it cause a depletion region to form around the body terminal
@@rajuchintapatla979 Hey lets take a NMOS and assume it as a Capacitor, Gate is one end of the cap and the channel is another end. Lets say you apply positive potential on one side of the cap (ie gate terminal) then automatically the other plate of the cap will be negative (ie Channel/ Channel gets formed). Now similarly your body terminal acts as a positive terminal of the plate, the more positive it becomes more negative the channel will be. So whenever you apply a positive potential on the body, a part of channel will already be formed which seems like lowering the Vt on the Gate potential
@@chetanggs The thing is , here Vbs > 0 hence Vb - Vs > 0, Vs = 0 (gnd) hence Vb > 0 (voltage at body terminal increases ). Now go by the eqn, it has Vsb term in it. Now Vsb = Vs - Vb, Since Vb is increasing hence Vsb decreases. Since Vsb now decreases therefore Vt also decreases as per the eqn. Also as per the theory, the body terminal is connected to the most negative terminal (for NMOS). To prevent it from becoming forward biased with the source or the drain. If the setting becomes forward biased then a leakage current might flow between body and drain or source, we dont want that.
Greetings sir, I have one doubt at 8:02, why the Vth value will decrease when the VBS value is increasing..actually, it should increase right because it is attracting all the electrons in the channel right?
Hi! If Vbs increases then holes are repelled, and more holes accumulate near the depletion layer creating more positive potential . The potential at surface near gate is more negative compared to the potential in bulk, which corresponds to more electrons near gate surface compared to before by Maxwell - Boltzmann equation.
The thing is , here Vbs > 0 hence Vb - Vs > 0, Vs = 0 (gnd) hence Vb > 0 (voltage at body terminal increases ). Now go by the eqn, it has Vsb term in it. Now Vsb = Vs - Vb, Since Vb is increasing hence Vsb decreases. Since Vsb now decreases therefore Vt also decreases as per the eqn. Also as per the theory, the body terminal is connected to the most negative terminal (for NMOS). To prevent it from becoming forward biased with the source or the drain. If the setting becomes forward biased then a leakage current might flow between body and drain or source, we dont want that.
At 3:25, in an nmos device with p substaret, when we apply positive gate voltage to create an inversion layer, negative ions and electrons accumulate at surface or holes deplete, then negative charges should create negative surface potential. Why is surface potential of nmos device positive sir?
At 5:33 If we apply positive potential on the body terminal wont it attract all the free electrons to the body terminal;
wouldn't it cause a depletion region to form around the body terminal
Do you got the answer for your question? If share
@@rajuchintapatla979 Hey lets take a NMOS and assume it as a Capacitor, Gate is one end of the cap and the channel is another end. Lets say you apply positive potential on one side of the cap (ie gate terminal) then automatically the other plate of the cap will be negative (ie Channel/ Channel gets formed).
Now similarly your body terminal acts as a positive terminal of the plate, the more positive it becomes more negative the channel will be.
So whenever you apply a positive potential on the body, a part of channel will already be formed which seems like lowering the Vt on the Gate potential
@@chetanggs thanku u 🙂
@@chetanggs The thing is , here Vbs > 0 hence Vb - Vs > 0, Vs = 0 (gnd) hence Vb > 0 (voltage at body terminal increases ). Now go by the eqn, it has Vsb term in it. Now Vsb = Vs - Vb, Since Vb is increasing hence Vsb decreases. Since Vsb now decreases therefore Vt also decreases as per the eqn. Also as per the theory, the body terminal is connected to the most negative terminal (for NMOS). To prevent it from becoming forward biased with the source or the drain. If the setting becomes forward biased then a leakage current might flow between body and drain or source, we dont want that.
Greetings sir, I have one doubt at 8:02, why the Vth value will decrease when the VBS value is increasing..actually, it should increase right because it is attracting all the electrons in the channel right?
Hi! If Vbs increases then holes are repelled, and more holes accumulate near the depletion layer creating more positive potential . The potential at surface near gate is more negative compared to the potential in bulk, which corresponds to more electrons near gate surface compared to before by Maxwell - Boltzmann equation.
Same doubt I have
The thing is , here Vbs > 0 hence Vb - Vs > 0, Vs = 0 (gnd) hence Vb > 0 (voltage at body terminal increases ). Now go by the eqn, it has Vsb term in it. Now Vsb = Vs - Vb, Since Vb is increasing hence Vsb decreases. Since Vsb now decreases therefore Vt also decreases as per the eqn. Also as per the theory, the body terminal is connected to the most negative terminal (for NMOS). To prevent it from becoming forward biased with the source or the drain. If the setting becomes forward biased then a leakage current might flow between body and drain or source, we dont want that.
At 3:25, in an nmos device with p substaret, when we apply positive gate voltage to create an inversion layer, negative ions and electrons accumulate at surface or holes deplete, then negative charges should create negative surface potential. Why is surface potential of nmos device positive sir?
the surface potential of nmos is with respect to the bulk potential so since bulk is at a higher potential so it is positive .
11::00_08-04-24_@IIIT-H
body effect --> imagine in terms of depletion region ( | >--
nice lecture sir