Cascade Current Mirror - Analog Circuit Design Interview

[@vlsiorg]

@ 4.56 --> The MOS goes into Linear ( I have recorded as saturation though 😃 ) Make a note please

[@Himanshutiwari590]

Good explanation

[@nikhilshahvuppala9081]

This problem and explanation are good.. Thank you very much ..

[@vlsiorg]

Happy to know this was helpful. Happy learning 😃

[@Ayushchauhan-wi5pl]

Can we say when both mos are in saturation intially, (Ids vs Vds) curve for both Mos overlap ??

[@somendas7711]

great explanation. Thanks a lot.

[@黄少天-m4n]

😃M2 was the cascode device, which acts as a sheild. The voltage of M2 source change very little when its darin changes.( all in saturation)

[@filipfabri4998]

thanks for the answer, you are an absolute chad 👑

[@arnabdeb3517]

Yes it's correct that the cascode transistor shields the CS transistor....but if Vx falls below Vb-Vth then M2 would go into linear first followed by the transistor below

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[@saidulu97]

the explanation is misleading in a different way. not the exact answer

[@Jmarumq]

It think so！