AMBA - AXI Part 2 Read burst Operation with waveform
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- Опубликовано: 14 окт 2024
- #axi #amba_axi #amba #vlsi #system_verilog #system-verilog #uvm #system-verilog-coding #vlsi_design_verification #verilog
We are providing VLSI Front-End Design and Verification training (Verilog, System-Verilog, UVM, AMBA protocols) for fresher/professionals over weekends with job assurance, for more info can Whatsapp @ 9997615007
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This session will helpful to understand the Read burst operation in AXI protocol
We are providing VLSI Front-End Design and Verification training (Verilog, System-Verilog, UVM, AMBA protocols) for fresher/professionals over weekends with job assurance, for more info can Whatsapp @ 9997615007
please make more videos sir.....specially assertion and functional coverage.....it's really helpfulll.......
We will try
Can you explain why read data channel trnx start on neg edge and then pos edge? isn't it should be pos edge?
Yeah.. I think that's a mistake
Excellent
Thanks
As in the example shown that the burst type was increment and address was h0 and there were 4 transactions that means that for every 4byte transaction the address will increment. Please clear that point.
awlen means no of transfers per transaction
awsize means no of byte transfers per transfer
so total no of transactions will be awsize*awlen
next addr will be increment by awsize
Hii
hai can you explain about out 0f order transaction and unaligned transfers in axi?it bit confusing .thank you
sure, i will make a video on that
@@emicrobyte thank you sir
Plz send the code for axi
what code you need for axi...
@@emicrobyte how to start project
@@darshilldesai8993 which kind of project you asking about it is design or verification or vip devlopment ??
Any verilog code for communication using AXI?
@@emicrobyte how to contact you? My mobile number 9662325155