Hi professor. As a virtual student of yours, it's my pleasure to announce that I have got my first job as standard cell layout engineer at synopsys, Hyderabad, India Your lectures have been key to understanding VLSI. I started following your lectures at a time when it all seemed impossible to understand VLSI, when I started it. And here I am with your blessings. Here's the fun part Now I was acquainted with CMOS process and device physics but Library development here is going at 2nm finger for XYZ company( you know the name), and I was searching for resources to learn about finfets and finally arrived here, where everything began. Professor, i'm truly grateful
It really warms my heart hearing this. I have a passion for teaching and sharing the knowledge that I acquire with the broad community. I have found that in the semiconductor world, it is quite hard to find simple, low level and detailed explanations and I have had to work hard to truly understand many (maybe most) of the concepts I have learned. Therefore, I try to pass them on to people like you. When I read such a message from you, it makes it all worth it!
Having a process engineer give me such a complement, I am ecstatic. I actually have no real process background and have never even been inside a clean room! I only try to repeat things I have heard others talk about and have read in literature. So I hope I'm not saying anything too inaccurate and I'm happy to have comments, additions and corrections!
@@AdiTeman Thank you for your reply professor. It's my honor. Your lecture is great. Personally, I think it will be great if we have materials to combine the process flow with the device properties together. From the perspective of process flow, we know how to build a MOSFET/FinFET in practice (in a very rough view). However, to me, the key is the final electrical properties of this device. So if we can summarize how each process flow is related to the device, it would be great for people to learn and people can have a feeling about why this process matters. This is also my expectation for myself while studying flow, and device :)
Yes, all slides can be found on my website. Specifically this slide deck is at: www.eng.biu.ac.il/temanad/files/2022/03/Lecture-2-Advanced-Process-Technologies.pdf
The PPT is on my website under the Digital Integrated Circuits course: www.eng.biu.ac.il/temanad/digital-integrated-circuits/ Specifically, the slides are at: www.eng.biu.ac.il/temanad/files/2022/03/Lecture-2-Advanced-Process-Technologies.pdf
Great question. These are the STI layers that separate between transistors. It's a bit confusing because this diagram is rotated 90 degrees from how we "usually" look at transistors. But we need some isolation between active areas and this is achieved with an oxide layer.
@@AdiTeman Ok got it! So it's just to isolate from other transistors. Was wondering if it had any functional use for the transistor itself. Thanks a lot again! This whole series helped me a lot
Hi professor. As a virtual student of yours, it's my pleasure to announce that I have got my first job as standard cell layout engineer at synopsys, Hyderabad, India
Your lectures have been key to understanding VLSI. I started following your lectures at a time when it all seemed impossible to understand VLSI, when I started it.
And here I am with your blessings.
Here's the fun part
Now I was acquainted with CMOS process and device physics but Library development here is going at 2nm finger for XYZ company( you know the name), and I was searching for resources to learn about finfets and finally arrived here, where everything began.
Professor, i'm truly grateful
It really warms my heart hearing this.
I have a passion for teaching and sharing the knowledge that I acquire with the broad community. I have found that in the semiconductor world, it is quite hard to find simple, low level and detailed explanations and I have had to work hard to truly understand many (maybe most) of the concepts I have learned. Therefore, I try to pass them on to people like you.
When I read such a message from you, it makes it all worth it!
awesome
As a process engineer, your lecture is wonderful for review and organizing everything together! Thank you!
Having a process engineer give me such a complement, I am ecstatic.
I actually have no real process background and have never even been inside a clean room! I only try to repeat things I have heard others talk about and have read in literature. So I hope I'm not saying anything too inaccurate and I'm happy to have comments, additions and corrections!
@@AdiTeman Thank you for your reply professor. It's my honor. Your lecture is great.
Personally, I think it will be great if we have materials to combine the process flow with the device properties together. From the perspective of process flow, we know how to build a MOSFET/FinFET in practice (in a very rough view). However, to me, the key is the final electrical properties of this device. So if we can summarize how each process flow is related to the device, it would be great for people to learn and people can have a feeling about why this process matters. This is also my expectation for myself while studying flow, and device :)
And, I am following your other lecture on process variation. That's interesting!!
Concise and lucid explanation! Thanks!
Glad you enjoyed it!
Amazing information. I am following your video on regular basis
Glad to hear that
Thank you for your very clear and understandable presentation!
You're very welcome!
Thank you Adi for such informative content ..
Keep it up :)
Thank you so much 🙂
thank you professor, do you have pdf file for the lecture?
Yes, all slides can be found on my website.
Specifically this slide deck is at: www.eng.biu.ac.il/temanad/files/2022/03/Lecture-2-Advanced-Process-Technologies.pdf
where can I found this PPTs?
I have found on your website but i haven't got.
please share the link of it.
The PPT is on my website under the Digital Integrated Circuits course: www.eng.biu.ac.il/temanad/digital-integrated-circuits/
Specifically, the slides are at: www.eng.biu.ac.il/temanad/files/2022/03/Lecture-2-Advanced-Process-Technologies.pdf
At 9:50, what is the use of the 2 oxide layers depicted in blue? Normally in cross section diagrams we do not see this oxide layer
Great question.
These are the STI layers that separate between transistors.
It's a bit confusing because this diagram is rotated 90 degrees from how we "usually" look at transistors. But we need some isolation between active areas and this is achieved with an oxide layer.
@@AdiTeman Ok got it! So it's just to isolate from other transistors. Was wondering if it had any functional use for the transistor itself. Thanks a lot again! This whole series helped me a lot
@@ctnrb741 Great!