Compiler directive & System tasks in Verilog | #14 | Verilog in Hindi

[@Yashwant_Chavan]

One of the best playlist on youtube for verilog.❤

[@priyankashivalkar4970]

Thank you madam for all playlist ❤❤

[@techyrao]

Very nice playlist. Appreciated

[@yogeshrathour6705]

Mam telegram channel ka link kaanm nhi Kar raha hai

[@sahajgarg1220]

When calculating the value of time for $stop, should it not be (1.55+1.55+50)*10= 530 instead of 500

[@omprakashbarupal2129]

I have same doubt

[@hemantsingh5145]

I am getting different order of display strobe and monitor. why mam?

[@dut_uut]

(1.55+1.55+50)*10= 530 instead of 500

[@farhanaaz8124]

maam can u make a video on system verilog

[@farhanaaz8124]

a complete tutorial on system verilog

[@2K22VLS16SHIVSHANKERYADAV]

meaningless content are written in ppts , use easy meaningful language, ur explanation is awesome but written content in ppt is meaningless deviating from real idea