Behavioral Modeling | #13 | Verilog in Hindi | VLSI Point

[@AliMuhammad-sm9hx]

this is probably most important video so far

[@sreekarvetsa805]

best playlist till now and will remain as best
Thank you mam

[@sushajambehta]

Your playlist is awesome

[@vlsipoint]

Thanks, Keep watching ✌✌

[@AbhishekMishra0131]

nice explanation....please make more such videos for verilog codes

[@vlsipoint]

Thanks Abhishek! Verilog coding videos will be uploaded soon. Stay connected ✌✌

[@AbhishekMishra0131]

@@vlsipoint Thank you

[@ayushbhargava4998]

Mam in the last example of 4 bit counter why we take 4'd0 it should be 4'b0

[@aadarshkumar6147]

It's in decimal

[@sapankushwaha4069]

Great!!!!!!

[@vipmrgaming8391]

Mem ek baar begin use karne par dobara kyon karte hain same code mein? Good playlist

[@utkarshsingh3487]

mam in 4x1 mux why you have declared OUTPUT as register ? Do we need to store the output ?

[@aagamsheth4051]

Yes mam , why we need to output as reg data type ???

[@aagamsheth4051]

@VLSI point

[@akashkumar3555]

very informative video !!

[@Muskaanhayat]

Mam blocking assignment ka only combinationl circuit m hi q use hota h

[@vlsipoint]

Blocking assignments can be used in both combinational and sequential circuits but nonblocking assignments can be used in sequential circuit only bcz of it's storage property.
Blocking assignments blocks the execution of next statements until it is executed but In nonblocking multiple assignments happens at a same time.

[@user-uz8wq4xn2l]

mam i want to ask doubts of verilog then can i ask you?

[@soumyodeephalder7919]

nice video

[@Muskaanhayat]

Nice

[@vlsipoint]

Thanks Muskaan!

[@2024Edu]

Regular delay and Intra-assignment delay explanation looks same...

[@durgeshprajapati2935]

you haven't expalin what is %d,$monitor please do.

[@arshadshaikh9014]

Maam I don’t understand about loop

[@SUMITKUMAR-vb3vr]

teaching so fast , as you think we know it already

[@Yashwant_Chavan]

Here 3:27 statement result not understand