Now its been 7 years u upload the video. I m doing masters in power electronic and control . Starting i don't know about FPGA. Even my teacher teach be about FPGA. I didn't understand what he said. But U are genius, and i understand what is FPGA . I watch your first video. This this is my 4th video. I m gonna watch your all video. Thanks again .... keep it up.. sir ..
I love your videos man. I'm a new FPGA designer (and a mechE, so totally don't know electrical stuff) and this is really helping me to grasp the basics!
Thank you SO much! I have been learning fpga's and verilog for a long time now at CU Denver and am going to watch your whole series bc I just seem to be struggling so much. You are so much more helpful than my professor and I really want to learn!
Thank you!!! for all of your videos. I mean for all of them. I'm Glad i subscribed and thank you "youtube" for providing the platform for seeing a one in a billion tutorial like this. Thanks man I really mean it.
Watched this for the second time, 6 months after the first, but now i have an FPGA dev board. light-bulb moment such a simple thing that as a traditional software programmer i never had to really worry about but this video really helps my understanding as i work on my FPGA project.
Should have paid more attention in class but this feels just like a personal explanation from my professor, so thank you so much!! I feel confident about going to class tomorrow.
Oh thank you for making this video. It was a pain to find something understandable on my 0 level in electronics. Like the other comments say, please, do more videos. We like your videos a lot :)
Amazing video, this is a much better explanation on D Flip-Flops than my professor gave me. Too bad you couldn't be teaching my digital logic class, because I am sure I would actually learn and enjoy the course.
Great video. Hard to find information on this topic with RUclips. A few comments though: A *register* is defined as a group of flip flops. Therefore, a 4-bit register is just a group of four flip flops, each one holding 1 bit of data. LUT? You mean a *truth table* . It's called a truth table whenever you're dealing with combinational circuits (the ones without storage elements). The moment you get into sequential circuits (circuits that have flip flops) it becomes a *state table* . I would replace "LUT" with "state table" because the accompanying diagram is called a state diagram, and then ultimately you produce the circuit diagram. A *state table* fully describes the operation of the sequential circuit. A state table contains a column for the present state, the inputs, the next state, and any outputs. But when you really get right down to it, the state table is just a truth table that includes present state as one of the inputs. It's also important to mention what a flip flop is. *A flip flop is storage for 1-bit of data, which can be either 0 or 1* . There are three types of flip flops commonly taught in digital logic courses: - D flip flop - T flip flop - JK flip flop *The D flip flop (data) is by far the easiest to understand:* - If you input 0, it stores 0 and outputs 0. - If you input 1, it stores 1 and outputs 1. *The T flip flop (toggle) operates as follows:* - If you input 0, the current state is maintained and outputted. (0 stays 0, 1 stays 1) - If you input 1, the current state toggles to its opposite and is outputted. (0 becomes 1, 1 becomes 0.) *The JK flip flop is the most advanced and most complex* . *It has TWO inputs (J and K) plus the clock:* - If J = 0 and K = 0: Current state is maintained and outputted. (0 stays 0, 1 stays 1) - If J = 1 and K = 0: Current state is set to 1 and outputted. - If J = 0 and K = 1: Current state is reset to 0 and outputted. - If J = 1 and K = 1: The current state toggles. (0 becomes 1, 1 becomes 0). Therefore, the JK flip flop can perform the operations of both the D flip flop and the T flip flop in one. Why use different flip flops? Well, sometimes the logic is a lot more complex to implement with one type of flip flop than it is with another. That can greatly affect the speed of the circuit.
one way to think of it too, is the "gears" or clock are like tidal waves, coming in and out, with the polar harmony generating the "life" of the circuit. (this helps if your familiar with the concept that the early earth had a moon closer to it causing 100 mile tides, potentially creating life, just like the "life" of the circuit is created by this back and forth, on and off, clock motion. but anyways....... lol)
thanks for the videos! and thank you for your website too! i dont really understand why so many people work so hard to put out good work like this for everyone to use, when so many people dont even use it. they want better jobs and a better life yet these free resources go ....... anyway ..... //end of rant. thank you!
If there's a propagation delay in Q1, why not on D1? I can understand the second flip-flop being delay 1 clock cycle. But that's not the same as the sampling propagation delay is it?
Superb information. Will you guide to use flip flop's in making a model train signalling system involving only 2 leds (red and green) per flip flop cascaded so that each flip flop triggers the next one so that green becomes red once the train passes the sensor say magnetic reed switch on the track.
Thanks for the videos. My main concern is that, although I do get what is happening, I can't make the connection to an actual application that would need this method. So, why would retarding a signal by 1 circle be of use? Would it mean by appending several D-Flip Flops that share the same clock, I can keep in "memory" the data (for N flip flops I could keep the signal for N clock ticks)? Would that be how to create a "MEMORY" functionality in a calculator for example? (not sure if we keep the data or the output of the flop actually).
Now its been 7 years u upload the video. I m doing masters in power electronic and control . Starting i don't know about FPGA. Even my teacher teach be about FPGA. I didn't understand what he said. But U are genius, and i understand what is FPGA . I watch your first video. This this is my 4th video. I m gonna watch your all video. Thanks again .... keep it up.. sir ..
We did these basics in cs courses, but you fill the gaps in my knowledge very nicely. Those bits of intuition you give make it a lot easier to digest
You explained this the same way a college buddy would. You're really good at this.
More videos!!! These are great. It's like FPGA for dummies.
I love your videos man. I'm a new FPGA designer (and a mechE, so totally don't know electrical stuff) and this is really helping me to grasp the basics!
Your talking way is very comfortable to me. Update more videos.
I like FPGA.
Your tutorials has been great! You provide layman explanation on niche technical terms, it is newbie friendly! Thanks for your effort.
I've been struggling to understand the concept of flip-flop, but now all I can say is thank you.
Thank you SO much! I have been learning fpga's and verilog for a long time now at CU Denver and am going to watch your whole series bc I just seem to be struggling so much. You are so much more helpful than my professor and I really want to learn!
Thank you!!! for all of your videos. I mean for all of them. I'm Glad i subscribed and thank you "youtube" for providing the platform for seeing a one in a billion tutorial like this. Thanks man I really mean it.
Watched this for the second time, 6 months after the first, but now i have an FPGA dev board. light-bulb moment such a simple thing that as a traditional software programmer i never had to really worry about but this video really helps my understanding as i work on my FPGA project.
Should have paid more attention in class but this feels just like a personal explanation from my professor, so thank you so much!! I feel confident about going to class tomorrow.
Good job dude, nice explained and easy to follow. Very interesting to me since I am new to FPGA. Looking forward to your next video!
That was an amazing elucidation of what a flip flop is....simple and crisp.
Sir,please post more videos. Your explanations are really easy to understand. Helped alot. Thank you.
Seriously? Kitna Padhai karega be? :/ . should i even be surprised to see you here... Jokes apart, thanks for the brilliant explanation man
Ur teaching pattern is quite interesting.. And also speaking style is very pleasant. Well done thank you 🙂💐
Russell. Your video tutorials are the best. I'm ordering a Go Board.
The flip flop and rising edge of the clock was so well explained, thanks 🙏
very useful video. I am new to FPGA, but it is very easy to understand what you say. Thank you.
This video is literally GOLD.. ty so much!!!
Please make much more videos sir, you’re a great teacher . Please do more videos on these type of contents
I would watch these videos all day.
Oh thank you for making this video. It was a pain to find something understandable on my 0 level in electronics. Like the other comments say, please, do more videos. We like your videos a lot :)
Thank you for making these videos, they are awesome and the way you explain things are awesome.
Amazing video, this is a much better explanation on D Flip-Flops than my professor gave me. Too bad you couldn't be teaching my digital logic class, because I am sure I would actually learn and enjoy the course.
Thanks for making this videos they are great and very easy to understand even for me that Im not a native speaker
These videos are great, we need a bigger board
These videos are great. I was able to get a really clear understanding of the flip flop after this video.
it is old, but still helping people. It is really helpful.
Thanks for your videos, they're great! I am a little worried about how much ink is getting on your shirt, though.
I confuse how to save date with D when D changing with clock in H state.
Just loved your way of explanation...
You sir, are a master. Thank you for this!
plz add more video :) can't wait!
All tha brain storage to learn about all the different flip -flops... sigh - thx Nand great video !
Easy to follow, good explanations. Subscribed. Please more videos :)
Great video. Hard to find information on this topic with RUclips. A few comments though:
A *register* is defined as a group of flip flops. Therefore, a 4-bit register is just a group of four flip flops, each one holding 1 bit of data.
LUT? You mean a *truth table* . It's called a truth table whenever you're dealing with combinational circuits (the ones without storage elements). The moment you get into sequential circuits (circuits that have flip flops) it becomes a *state table* . I would replace "LUT" with "state table" because the accompanying diagram is called a state diagram, and then ultimately you produce the circuit diagram.
A *state table* fully describes the operation of the sequential circuit. A state table contains a column for the present state, the inputs, the next state, and any outputs. But when you really get right down to it, the state table is just a truth table that includes present state as one of the inputs.
It's also important to mention what a flip flop is. *A flip flop is storage for 1-bit of data, which can be either 0 or 1* .
There are three types of flip flops commonly taught in digital logic courses:
- D flip flop
- T flip flop
- JK flip flop
*The D flip flop (data) is by far the easiest to understand:*
- If you input 0, it stores 0 and outputs 0.
- If you input 1, it stores 1 and outputs 1.
*The T flip flop (toggle) operates as follows:*
- If you input 0, the current state is maintained and outputted. (0 stays 0, 1 stays 1)
- If you input 1, the current state toggles to its opposite and is outputted. (0 becomes 1, 1 becomes 0.)
*The JK flip flop is the most advanced and most complex* . *It has TWO inputs (J and K) plus the clock:*
- If J = 0 and K = 0: Current state is maintained and outputted. (0 stays 0, 1 stays 1)
- If J = 1 and K = 0: Current state is set to 1 and outputted.
- If J = 0 and K = 1: Current state is reset to 0 and outputted.
- If J = 1 and K = 1: The current state toggles. (0 becomes 1, 1 becomes 0).
Therefore, the JK flip flop can perform the operations of both the D flip flop and the T flip flop in one.
Why use different flip flops? Well, sometimes the logic is a lot more complex to implement with one type of flip flop than it is with another. That can greatly affect the speed of the circuit.
Very good explanation. Still relevant today!
Great Tutorials Sir Please do more. Thanks!!
I have not many time to learn, but I will try understand it. I love electronics :-)
one way to think of it too, is the "gears" or clock are like tidal waves, coming in and out, with the polar harmony generating the "life" of the circuit. (this helps if your familiar with the concept that the early earth had a moon closer to it causing 100 mile tides, potentially creating life, just like the "life" of the circuit is created by this back and forth, on and off, clock motion. but anyways....... lol)
Thanks for the video , please continue your good work , believe me they are very helpful .
Great Videos! I am stil hoping for more in the future!
Clear and helpful. Thank you very much!
First time ever I see this type of content and you make it pretty understandable! Please keep making this videos!
Q2 is logic low because of propogation delay at second rising edge.Q does not change at the same time as the clock. It has a small delay each time.
thank for your videos they are really helpful .. just i want to say that i use NE555 like a clock
brother many thanks for the easy cool presentation....
Thank you! Exactly what I was looking for.
u r a great orator ,, please keep on making these kinda videos
Great video , really good explanation !
This was really well explained, I agree with the other comments--make more videos!
thanks mate you saved my test
thanks for the videos! and thank you for your website too! i dont really understand why so many people work so hard to put out good work like this for everyone to use, when so many people dont even use it. they want better jobs and a better life yet these free resources go ....... anyway ..... //end of rant. thank you!
It is really interesting. Thank you
More understandable than my penn state teacher. Thank you!
Ian F Penn State here too. What year do you take this class?
Excellent introduction
such an amazing tutorial.
That's great. Thanks for easy way in explanation .
Thank you so much!
You save my life
Your are the best teacher thank for ur wonderful video explanation
Thanks mate, explained calm and easy!
Thanks this really cleared up a lot of stuff.
Excellent video
Thanks Russel, very well explained.
Best explanation ive seen so far :p
OK, this is "The" channel for FPGAs
thank you ! i got some % about F-F
Excellent man, thanks a lot!
Thank you for this video!
Well explained my man.
Thank you for this one!
Great explanation!
Congrats
Great videos, very valuable content, thank you for sharing your knowledge, congrats!!
Best video I've ever watched
thank you man, wish u make more tutorials
Great info! Thank you
Thanks, It was so good
love your videos!
Las esplicaciones son faciles de entender. seria muy conveniente poner una numeracion que indique una secuencia de videos de inicio al mas reciente.
Great work, keep it up!
Good explaination.
clear explanation
thanks man, very good explanation . keep up
If there's a propagation delay in Q1, why not on D1? I can understand the second flip-flop being delay 1 clock cycle. But that's not the same as the sampling propagation delay is it?
Thumbs Up!! Buddy , U are Amazing...
Superb information. Will you guide to use flip flop's in making a model train signalling system involving only 2 leds (red and green) per flip flop cascaded so that each flip flop triggers the next one so that green becomes red once the train passes the sensor say magnetic reed switch on the track.
Digital Techniques ... How do you write in software?
if you look closely you'll actually see that he is not standing but is rather sitting on something
U are doing a great job!
nice .easy to understand
Rewatching these videos is critically important.
You Are Amazing !!
what you describe is a latch not a flipflop though it's confusing because often the words are interchanged
Great tutorials ..thank you
thanks a lot, really good explanation
Wonderful! Thanks.
The process control industry mostly uses SR-FlipFlops. No clocks just states!
For ASICs you mean?
You are great! Thank you.
Thanks for the videos. My main concern is that, although I do get what is happening, I can't make the connection to an actual application that would need this method. So, why would retarding a signal by 1 circle be of use?
Would it mean by appending several D-Flip Flops that share the same clock, I can keep in "memory" the data (for N flip flops I could keep the signal for N clock ticks)? Would that be how to create a "MEMORY" functionality in a calculator for example? (not sure if we keep the data or the output of the flop actually).
You are goodlooking :))