How to create a Blinking LED on FPGA? | Xilinx FPGA Programming Tutorials

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  • Опубликовано: 17 окт 2024

Комментарии • 50

  • @SimplyEmbedded
    @SimplyEmbedded  6 лет назад +7

    Hope you Enjoyed this Tutorial! Let me know what tutorial would you like to see next in the comments section below!

    • @ghalanebal1734
      @ghalanebal1734 4 года назад

      She

    • @ghalanebal1734
      @ghalanebal1734 4 года назад

      B j get

    • @zishanmalik6532
      @zishanmalik6532 Год назад

      You have a very clear style of speaking, explaining things, and de-conflicting the programming technique. Thank you so much.I would like to see your tutorials on verilog as well

  • @AllAboutFPGA
    @AllAboutFPGA 4 года назад +3

    led blinking in FPGA is all about divide the clock to make the led on/off visible. Once again nice tutorial on FPGA.

  • @user-weird
    @user-weird 2 года назад +1

    Very comprehensive and tricky exercise on FPGA, appreciate your effort and tutorial.

  • @MilanKarakas
    @MilanKarakas 5 лет назад +8

    Well, it is really difficult to follow since I am not (yet) familiar with verilog, VHDL, HDL and everything related. Also, I have Altera FPGA, not Xilinx, but that should be no problem if syntax is similar. I wanted to buy some book on VHDL, but out there are many, not sure which to chose for complete beginners? I know C/C++, Java, little bit of Python, but not FPGA related stuff (I know that there is also C/C++, but how to implement, that is tricky part).

  • @mukulsharma8616
    @mukulsharma8616 6 лет назад +2

    8bit counter which count at input from one slide switch, use seven segment display for count value.
    Keep up the good work 👌👍

    • @SimplyEmbedded
      @SimplyEmbedded  6 лет назад +1

      Jimmy, Thanks for your support! I'll keep it in mind and try to set up something with it!

    • @phaneeshwarm3373
      @phaneeshwarm3373 4 года назад +1

      It is an amazing video, can please do videos on Fsm in detail, optimize verilog

  • @asifsurti9154
    @asifsurti9154 2 года назад

    Thanks. It is quick slick and to the point which helps!

  • @kerstyfokin369
    @kerstyfokin369 2 года назад

    Hello, yes I have enjoyed your tutorial . I am a beginner in programming. and I have a question. I did all like in your Video but in the end there was no Blackboard_MasterDC_rev1.xdc generated :( What can be the mistake?

  • @Mrrawness24
    @Mrrawness24 4 года назад +1

    How do I get the vivado design suite? Need to start ASAP!

  • @mbuaesenju8514
    @mbuaesenju8514 2 года назад

    Very cool tutorial. Thank you!

  • @araortiz978
    @araortiz978 5 месяцев назад

    After quite a few trials and errors I was able to create a bit stream for my board :). LED is ON/OFF for ~30 seconds though, hmmm!

  • @randtechlab
    @randtechlab 2 месяца назад

    can you write a code for me where I can load to bitstream, I've Basys2 FPGA Spartan 3e, xcf02s platform flash. it supports multiboot. I can't find anywhere, even chatgpt is unable to write code.

  • @mattgilliam
    @mattgilliam 5 лет назад +1

    so far your videos have been very helpful, i just was wondering why you didn't go over the constraint file for this video in the detail that you did in the previous videos considering that the new clock constraint was something you introduced in this video. like how did you know what pin to choose, or what exactly does the create clock line do? also for a future video i was wondering if you could provide a tutorial on how to implement the FPGA with an H-bridge or how to create a current detector using the 7seg display, an H-bridge, and a shunt resistor. thank you for the help you have given so far!

    • @annakozio9220
      @annakozio9220 5 лет назад +2

      Here is some useful video by Xilinx about creating clock: www.xilinx.com/video/hardware/creating-basic-clock-constraints.html

  • @mamathan7365
    @mamathan7365 2 года назад

    Sir please teach how to use and change user programmable clock in AC701 evaluation kit

  • @yogitachoudhary1670
    @yogitachoudhary1670 3 года назад

    How can I generate a clock signal with a non integer frequency such as 6.78Mhz using a clock divider?

  • @382946rthu
    @382946rthu 5 лет назад

    One always was all you needed, clear the value then invert on the next line. Having two always blocks creates two comparators.

  • @kathleenvensdeguzman6861
    @kathleenvensdeguzman6861 3 года назад +1

    What software did you use on this?

    • @kawrx2002
      @kawrx2002 2 года назад

      That's Vivado for Xilinx boards

  • @mix0797
    @mix0797 5 лет назад +2

    hello, why did you choose clk =100MHz?. I don't understand here.

    • @SimplyEmbedded
      @SimplyEmbedded  5 лет назад +1

      Hello! By default for this development board the generated clock is 100MHz. Hope this helps!

    • @mix0797
      @mix0797 5 лет назад

      @@SimplyEmbedded if the development board don't support clock generator external, how to generate clock ?. Thank you very much.

    • @zakel5750
      @zakel5750 5 лет назад +1

      @@mix0797 I have the cora Z7 board and clock signal is generated by the Ethernet ship (125MHz). So you can generate from any ship like simple 555 or from a crystale.

    • @mix0797
      @mix0797 5 лет назад

      okey, thank you.

  • @parthsarthimishra1477
    @parthsarthimishra1477 2 года назад

    Can you please show how to send this file to xilinx board and run it there ?

  • @adilhameed2516
    @adilhameed2516 4 года назад

    Can You help me how can i on off led on fpga using bluetooth module

  • @RubyZagan
    @RubyZagan 3 года назад

    was wondering how you could llight up multiple led's and not just one.. like light up every other. im trying to do that right now and im failing so hard

  • @brendanhayes-oberst1398
    @brendanhayes-oberst1398 2 года назад

    what is the song in the beginning??

  • @uccoskun
    @uccoskun 4 года назад +2

    Can somebody post the constrain file commands, please?

  • @ayanohuiying9116
    @ayanohuiying9116 4 года назад

    i so bad at coding and my school assigment needed us to code blink item led for 5 times
    which i had no idea how to start

  • @huynguyenquang1104
    @huynguyenquang1104 2 года назад

    very gud ♥

  • @jegjessing
    @jegjessing 4 года назад

    Argh, wrote the code 100% as you did. Even the comments, but divided_clk never toggles :-( I have set clk

    • @wolfgeowild8709
      @wolfgeowild8709 3 года назад

      same problem here, have u found the solution ?

    • @jegjessing
      @jegjessing 3 года назад

      Nope, unfortunately not.. But I'd love to hear from anyone that did

    • @wolfgeowild8709
      @wolfgeowild8709 3 года назад

      @@jegjessing there is an answer from Mr. H van der Linden so hope this will help. At least it works for my board

    • @andrewseo2567
      @andrewseo2567 3 года назад

      @@wolfgeowild8709 Can you be more specific?

    • @wolfgeowild8709
      @wolfgeowild8709 3 года назад

      @@andrewseo2567 hi, finally get myself here. So…the comment explaining why it’s not working seems to be deleted for some reason but anyway… As I remember, u should place the clock divider always block before the counter always block, then it should work properly. Hope this gonna help.

  • @inbalmizrahi1611
    @inbalmizrahi1611 4 года назад +1

    How do you get the constraints file?

    • @jameschase4785
      @jameschase4785 4 года назад

      your constraint file will depend on your board, this guide can walk you through getting the files download for your board reference.digilentinc.com/vivado/getting_started/start

  • @petrogcracker6718
    @petrogcracker6718 4 года назад

    it would be great to find a video for someone who doesnt know nothing

  • @abdurrahman1734
    @abdurrahman1734 3 года назад

    Is audio and video is out of sync for this video or I am the only one feeling this?

  • @382946rthu
    @382946rthu 5 лет назад

    Never do equal, always say greater than or equal. Image what would happen if you had a glitch.

  • @martinsmith5670
    @martinsmith5670 3 года назад

    wow 15 minutes of complex operations to divide a clock