Hw Problm 1 explained properly😊: We use complement of A and B asitis as inputs for nor gate. And for other we use complement of C and D asitis as input for other nor gate. We use output of both nor gates as input of one more not gate and hence we get required result. :D
First que-7 Nor gates Second question - 7nor gates 2)(A' + B' )' = AB NoR (C'+D)'= CD' . Do nor for AB + CD' = (AB+CD')' and again do nor for ((AB+CD')')' = AB + CD' 1) (A'+B)'+(C'+D)' do nor operation individually then it is = A.B' +C.D' do NOR then (A.B' )'+ (C.D')' =( A'+B)(C'+D) Sorry if iam wrong ...
@@MrPotaatooo a nor a=a' and this a' nor with B gives (a'+b)'=a.b' Then c nor c=c' and this c' nor with D gives (c'+d)'=c.d' then nor both the output I.e a.b' nor c.d' this will give the final output (a.b'+c.d')'=(a.b')'.(c.d')'=(a'+b).(c'+d) My 2nd answer is also coming as 5.
🔴H/W problem 1: ✔️Ans: 5 NOR Gates are required. .............................................................. 🔴H/W problem 2: ✔️Ans: 7 NOR Gates are required.
Number of NOR gates NOT-1 AND-3 OR-2 X-OR=5 X-NOR=4 NAND-4 If y=A.B.C.D.E.F......n variables then, Min no of NOR gates=3(n-1)-k If y=A+B+C+D+E+...+n variables Min no.of nor gates=2(n-1)+k Where n= total no.of variables K= no.of complement variables
1: You need 5 2: You need 3...... not 7 NAND gates because the 4 inverters are redundant (X&Y) to one NAND and (W&Z) to another NAND and finally a NAND which has outputs of the 2 NANDS used earlier as i/p.
U r right.. It is self dual.... But how you combine (ab) and (c. d') .U need to put one extra gate to get the output expression. .It will be an OR gate.... But here is the condition we must only use nor gate ....so in this case there is no other way to get the output . So we require 7 gates to get the output....
great lectures sir! can u plz explain how you derive the form AB + (A+B)' from (A+(A+B)')*(B+(A+B)') at exactly 11:53?? i can't grasp it ...thank's in advance
@@MrPotaatooo There were total 9 nor gates used in answer of first question and 4 of them were redundant as they were serving as not gates and eliminating them doesn't effect the output. So the answer is 9-4 which is 5.
u should read about CMOS logic circuit, in NAND gates, it uses 4 transistor only for each gate, and it will be efficient to apply it on TTL IC 7400 series (common uses for this chapter) its not present in this video btw, cmiiw
1 A ---> A' , B----> B' ( using nor as not) it needs two nor gates A' nor B' = (A' + B') ' = A. B (demorgans law) [ 1 nor] 2 C ----> C' ( need one nor gate) C' nor D = (C'+ D) ' = C. D' ( demorgans law) [1 nor] 3 A. B nor C. D' ( one nor) = (A. B + C. D' ) ' 4 again take step 3 answer as input like nor as not (A. B + C. D' ) ' nor (A. B + C. D' ) ' [1 nor] =( (A. B + C. D' ) ') ' = A. B + C. D' So total gates is equal to 7
2. A Nor1-->A(com),Bnor2-->B(comp) combine nor 1,2 obtain nor3 (AB), C Nor4-->c(comp),D combine c(comp),D by Nor5 we obtain (CDbar) .then combine Nor3,5 .we got(( AB+CDbar)whole bar) in NOR6 .to obtain result again NOR7 ----result AB+CDbar
Thank you sir for giving great concept with no nonsense talks
1. 5
2. 7
Your explanation is awesome... Sometime I want to like the video and found that video is already liked by me.😊😊
😆
🤣🤣Joke
Then first time you wasn't listen the lecture clearly......
Then you should try taking notes on the first go itself
#Neso Academy homework makes the concept concrete in the mind...
5&7
@pradeep kumar i dont understand h. W que plz explain me
Hw Problm 1 explained properly😊:
We use complement of A and B asitis as inputs for nor gate. And for other we use complement of C and D asitis as input for other nor gate. We use output of both nor gates as input of one more not gate and hence we get required result. :D
So, in total we use 5 nor gates.
What about the second question?
thank you for saving me the stress to learn these on my own
Ok😅
Your comment is 1 year old now😅
Sir, you are the best, thank you very much for your effort.
5 and 7
Great lecture :)
5, and 7.,very well explained sir thank you
First que-7 Nor gates
Second question - 7nor gates
2)(A' + B' )' = AB NoR (C'+D)'= CD' .
Do nor for AB + CD' = (AB+CD')' and again do nor for ((AB+CD')')' = AB + CD'
1) (A'+B)'+(C'+D)' do nor operation individually then it is = A.B' +C.D' do NOR then (A.B' )'+ (C.D')' =( A'+B)(C'+D)
Sorry if iam wrong ...
Prerequisite for this chapter, you should know De-morgans law of boolean algebra.
Thank you very much sir...
Your teaching skills are too good.
The answers for h/w
1. 5
2. 7
someone can explain me why for Question 1 of the he it is 5 and not 7?
@@MrPotaatooo a nor a=a' and this a' nor with B gives (a'+b)'=a.b'
Then c nor c=c' and this c' nor with D gives (c'+d)'=c.d' then nor both the output I.e a.b' nor c.d' this will give the final output (a.b'+c.d')'=(a.b')'.(c.d')'=(a'+b).(c'+d)
My 2nd answer is also coming as 5.
@@MrPotaatooo 1st question can be rewritten as ((A'+B)' + (c' +d)')' . Do this and you will also get 5
🔴H/W problem 1:
✔️Ans: 5 NOR Gates are required.
..............................................................
🔴H/W problem 2:
✔️Ans: 7 NOR Gates are required.
How it is coming
Thanks a lot man. Really helpful
Great lecture sir. Now I am confident that I can find minimum gates required to design any boolean circuit efficiently.
😉😇
H. W problems answers
1)5 NOR gates r required to get (A' +B). (C' + D)
2)7 NOR gate r required to get A. B + C. D'
How can you explain in detail
just amazing explanation......
Number of NOR gates
NOT-1
AND-3
OR-2
X-OR=5
X-NOR=4
NAND-4
If y=A.B.C.D.E.F......n variables then,
Min no of NOR gates=3(n-1)-k
If y=A+B+C+D+E+...+n variables
Min no.of nor gates=2(n-1)+k
Where n= total no.of variables
K= no.of complement variables
Q1 : 3 (2 i/p NOR gate)
Q2 : 3 (2 i/p NOR gate)
Totally different from everyone .... Please explain.... Dont write anything. To confuse everyone ..
Infinity x her first answer is right acc. To me my ans is also 3
I m not able to find 2 one
Plz hell shanmuga
@@infinityx9937 and yes just bcz uska ans different hai iska mtlb ye ni ki galt hai🙄
@@pakhisingh1470 please explain, how you got 3 for 1st question.
Your page show error on finding solution for these problems. I request u to fix it.
Yes same problem faced by me
Thank You Sir
Q1-> 7 Gates
Q2-> 4 Gates by modifying the expression: ( ( A' + B' ) . ( C' + D ) )'
You will get 5 in q2
i got 5 for q1
Ans 1) 5
2) 5
H.w problem answers
1). 5 NOR gate
2). 7 NOR gate
Thanks a lot
5 nor gates
1: You need 5
2: You need 3...... not 7 NAND gates because the 4 inverters are redundant
(X&Y) to one NAND and (W&Z) to another NAND and finally a NAND which has outputs of the 2 NANDS used earlier as i/p.
we are using NOR gates here
@@srinityapadma5125yes 😂
@Neso Academy do we have to get Paid Neso to get answer of homework problem?
1) 5 gates
2) 4 gates (if we first take dual of expression and then solve)
How answer of 1st question is 5 ?
Is the second one a self dual function ?? I don't think so. So it's not possible with 4 nor gates. Normal simplification leads to 7 nor gates.
U r right.. It is self dual....
But how you combine (ab) and (c. d') .U need to put one extra gate to get the output expression. .It will be an OR gate.... But here is the condition we must only use nor gate ....so in this case there is no other way to get the output .
So we require 7 gates to get the output....
1)correct
2) 7 gates
You are Right!
Q2-> 4 Gates by modifying the expression: ( ( A' + B' ) . ( C' + D ) )'
during driving 5.XNOR === how did you drive (A+(A+B)').(B+(A+B)') to (A+B)' +AB ?
by using the distributive propriety of addition
x1 + (x2 * x3) = (x1 + x2)(x1 + x3)
(A+B) is a common term for both, so it's like x1
Thanks for the video
thanks for making this video
VERY HELPFUL
I think XOR + 1 NOR gate gives XNOR ...But you did the opposite .Correct me if I'm Wrong
same doubt
Thank u for explaining !
1. 5
2. 7
Ravi sodhi plz explain both the ans
Thanks Sir😃😃
Thanx sir ji
answer
1) 5
2) 3
1 question answer- 8 nor gates
great lectures sir! can u plz explain how you derive the form AB + (A+B)' from (A+(A+B)')*(B+(A+B)') at exactly 11:53?? i can't grasp it ...thank's in advance
Answer:A+B'
Bro it's distributive law a+(bc)=(a+b).(a+c)
"And check for it OUTPUT "--- i like way the you speak 💝😋
thank you very much 🌸
Great video
Neso, your page always shows error. is the site under maintainence ?
Thanks it help me a lot
1) 5
2) 7
can explain me why for Question 1 of the he it is 5 and not 7?
@@MrPotaatooo There were total 9 nor gates used in answer of first question and 4 of them were redundant as they were serving as not gates and eliminating them doesn't effect the output. So the answer is 9-4 which is 5.
@@oggy107 thank you so much sir..now I got cleared 🙏🙏
why mostly NAND gates are to be used in layout designing?
u should read about CMOS logic circuit, in NAND gates, it uses 4 transistor only for each gate, and it will be efficient to apply it on TTL IC 7400 series (common uses for this chapter) its not present in this video btw, cmiiw
coz its a universal gate
if the -ve logic is used the diode gate will represents which gate ?
I Love Neso Academy ❤️
1) 5 and 2) 7
Please add ppt on your website of digital electronics
There is an error shows when I open solutions for digital electronics
PLZZ do something regarding this problem
sir ...what is the process to implement the given functions using minimum no. of nand gate
thank u sir
this is very helpful in 2019 :)
2022 too😂
Detailed Electronics lectures available in Urdu language
Thank you so much. But how many gates we need to verify using NOR gates to prove it as a universal gate? Please reply asap cuz i have an exam
'or', 'and', 'not' Hope you scored well in your exam 5 years back😉
5&7
thank u brother
1---5
2---7
🔥🔥🔥
Sir is it possible to know how many nor gate require by watching the x-nor gate I. E (ab+a'b')
6 nor gates are needed...
Actually 10 nor gates are there...but ignoring the redundant gates we get 6 gates as the final answer...
4:06
5:13
6:21
In this video xor needs 5 nor gate amd xnor needs 4 nor gate..is it correct.pls anyone clear my doubt
mera v yahi aa raha h, byt everyone has written 7 for 2nd question.
thank you sir ji thoda zoom
5 & 7 resp.
9 nor gate
could plz explain one example problem
1)5
2)5
5 nor gates are minimum requirment......
1st=5min gates
How A+A complement is only A complement?🇳🇵
Because A+A is considered as A
Pls explain me the answer I am not getting 5
1-) 5NOR or 6NAND
2-) 7NOR or 4NAND
Sir your site is not working
i dont understand what demorgands law
5 and 7
FROM WHERE i will get video on morgan's law & other law like a'+a=1,a*a'=0.,etc..???
thaks
Can someone explain how for second question it is 7
1 A ---> A' , B----> B' ( using nor as not) it needs two nor gates
A' nor B' = (A' + B') ' = A. B (demorgans law) [ 1 nor]
2 C ----> C' ( need one nor gate)
C' nor D = (C'+ D) ' =
C. D' ( demorgans law) [1 nor]
3 A. B nor C. D' ( one nor)
= (A. B + C. D' ) '
4 again take step 3 answer as input like nor as not
(A. B + C. D' ) ' nor (A. B + C. D' ) ' [1 nor]
=( (A. B + C. D' ) ') '
= A. B + C. D'
So total gates is equal to 7
@@artisharma9204 For minimum, you'll need 4 nor gates. (a nor b) nor (c nor d'). For d' you'll need 1 nor too. So in total 4.
@@jugnugill ok
Thanks
1- 5
It will be more better if you talk abit louder
The answers for homework are -
1- 5
2 - 5
How?
Mine is also coming 5 for both the questions.
Mine also
Mine ans is also 5 for both
@@bhanupratap-qj4lp my answer is 7 gates not 5
sir please upload the homework problems
Mera ans first ka 3 aur second ka 8 aa rha....
First ka mere according mera correct hai......
second ka koi bata do kaise kru🙏🙏
someone can explain me why for Question 1 of the he it is 5 and not 7?
Answers to h.w qns
(1). 9
(2). 7
if anybody who knows how to solve hw problem please explain
🙏🙏
1.{A Nor1->A(COM)} B nor2
{C Nor3->c(com)} D nor4
combining nor 2 ,4---->nor5
2. A Nor1-->A(com),Bnor2-->B(comp) combine nor 1,2 obtain nor3 (AB), C Nor4-->c(comp),D combine c(comp),D by Nor5 we obtain (CDbar) .then combine Nor3,5 .we got(( AB+CDbar)whole bar) in NOR6 .to obtain result again NOR7 ----result AB+CDbar
ഗ്ഗ്ഗ്
@@brindhabrindha2884 wowwwwww what an explanation thanks 😇
Hindi nahi useko
These is confused me 😶
5
6
First one i got 9
I got now 1)5
2)7
(i) 5
(ii) 7
5
5
7
57
Hindi may bolo
Please solve 404 error problem in the solution of homework asap
3
7
how come 3 ? Its coming 5. Please check and explain!