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Self-Bias Configuration of JFET (Mathematical Approach)

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  • Опубликовано: 2 янв 2017
  • Analog Electronics: Self-Bias Configuration of JFET (Mathematical Approach)
    Topics Discussed:
    1. Comparison between fixed-bias and self-bias configurations.
    2. Self-bias configuration of n-channel JFET.
    3. Operating point in self-bias configuration.
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Комментарии • 48

  • @mathewmwilamubanga7315
    @mathewmwilamubanga7315 2 года назад +5

    sir you are a genius and thank you so much for your lectures. I thought electronics was hard but i was wrong.

  • @naziazameer5632
    @naziazameer5632 6 лет назад +2

    Thank u sir for these lectures.... I like ur way of teaching

  • @agstechnicalsupport
    @agstechnicalsupport 6 лет назад

    Thank you again for these great lectures on transistors

  • @yahiaahmed4364
    @yahiaahmed4364 7 лет назад +3

    great explanation my dear
    You are the best

  • @gnquince
    @gnquince 6 лет назад +7

    That input voltage apply positively or negatively?

  • @shreyasingh2282
    @shreyasingh2282 3 года назад +1

    Thank youuu so much

  • @EngineeringAcademyEthiopia
    @EngineeringAcademyEthiopia Месяц назад

    How did you learn this all things? You are good within every subject

  • @christiandeguzman9711
    @christiandeguzman9711 7 лет назад +1

    thanks man

  • @tsyeudinpsyeuix970
    @tsyeudinpsyeuix970 6 лет назад +1

    Thanks a lot for mathematical approch,,i was trying to do it but couldnt...thanks

  • @hemanthgooty
    @hemanthgooty 7 лет назад

    great explanation

  • @krislenecondinato7836
    @krislenecondinato7836 6 лет назад

    thanks!

  • @AnoNymous-po5sx
    @AnoNymous-po5sx 3 года назад +5

    Without using graphical approach. How vould ypu find which root's correct Id value? Because we have two roots.

  • @hindustan1219
    @hindustan1219 7 лет назад +1

    is there no graphical approach for fixed bias circuit

  • @amitkumarsaha4994
    @amitkumarsaha4994 7 лет назад

    Id can be found by applying KVL across drain and source.

  • @hindustan1219
    @hindustan1219 7 лет назад +1

    plz give us some video of opamps too

  • @MATHEMATICSBYNITianHimanshu
    @MATHEMATICSBYNITianHimanshu 4 года назад

    tq sir

  • @xflamesnowyice727
    @xflamesnowyice727 6 лет назад +5

    how do you decided which Id to use as there will be 2 values for Id

  • @aninditpanigrahi3334
    @aninditpanigrahi3334 5 лет назад +1

    Make a video on op amp sir

  • @guillermorobledo2842
    @guillermorobledo2842 5 лет назад +1

    How did Vp move up to the numerator from the denominator of the fraction? I don't get it.

    • @AndrewKiethBoggs
      @AndrewKiethBoggs 10 месяцев назад

      He got (1-(Vgs/Vp)) to a common denominator. Vp/Vp = 1. So ((Vp/Vp) - (Vgs/Vp)) can combine to make (Vp-Vgs)/Vp. Where Vgs = IdRs.

  • @bhanukollipara3114
    @bhanukollipara3114 6 лет назад +1

    Slope decreases and Q pt moves from y-axis ...am I right?! (P.S.new learner)

  • @SaqibAli-iq8cv
    @SaqibAli-iq8cv 5 лет назад +3

    sir plz reply
    how do we know which Id value to use

    • @amlankiransahu8412
      @amlankiransahu8412 6 месяцев назад +1

      I think, your exam has gone well ,
      So the answer to your question is you will further check the 2 answers and the given Idss , that the correct answer should be less than idss .

  • @TheAljered
    @TheAljered 4 года назад +1

    Why do ID and IDQ have different balues on other solved problems online??? And how the hell do I get IDQ???

  • @muskanrath7125
    @muskanrath7125 6 лет назад +1

    Can these subtitles be removed

  • @csrahul4229
    @csrahul4229 7 лет назад

    Calculate the bias currents for the circuit as shown in Fig. 2 and verify that the transistor Q1 operates in
    the forward active region. Assume β=100 and IS=5x10-17A. How much does the collector current,
    change if R2 is 1% higher than its nominal value?

  • @akashkumarsingh640
    @akashkumarsingh640 6 лет назад

    🙏🙏🙏🙏🙏🙏 plz sir upload video on op -amp

  • @charlesritter9418
    @charlesritter9418 7 лет назад

    what is the difference between Id and Idq ? thanks

    • @amitkumarsaha4994
      @amitkumarsaha4994 7 лет назад +2

      no difference.... q is added to show that it's an element required to find Q point

  • @hemanthgooty
    @hemanthgooty 7 лет назад

    Sir will u complete syllabus before gate 2017 i.e opamps etc plz reply

  • @ZEdds414
    @ZEdds414 5 лет назад +1

    what if vp is not given? and Vgs(off) is given.

  • @kurapatichaitanya705
    @kurapatichaitanya705 6 лет назад +1

    Sir Please upload FET small signal model. FET amplifier also

    • @nthumara6288
      @nthumara6288 Год назад

      ya please upload jft common sorce ampilier voltage gain dirivation and equlent circuts

  • @houseprophet5612
    @houseprophet5612 4 года назад

    🙏

  • @chronobot2001
    @chronobot2001 4 года назад

    My head hurts.

  • @masbro1901
    @masbro1901 3 года назад

    10:31 its minus 1, why change to minus Vp?

  • @mrshamsularfeen9014
    @mrshamsularfeen9014 4 года назад

    Little bit complicated

  • @farawayskies
    @farawayskies 3 года назад

    I'm so fucked tomorrow.

  • @EK-zh9tw
    @EK-zh9tw Год назад

    i hope u could write G ans S properly. your G look like s

  • @AnujYadav-2011
    @AnujYadav-2011 4 года назад

    Sir ye to totally wrong h agr koi thank you bolta h to uska reply de dete ho pr koi question puche to uska koi reply nhi
    M ye janna chata hu ki operating point to (Vds,Id) honge na ki (Vgs,Id)

    • @you_r_unknown
      @you_r_unknown 7 месяцев назад

      He never give any reply to any one I only seen an ❤ symbol to some cmnt