01:25 - Intro and Review 05:37 - Current Mirror Examples: Multiplying Current 11:46 - Alternative Perspective 15:26 - Current Mirror Examples: Transistors in Parallel 19:33 - Quiz: Sizing Transistors 27:54 - Proper Scaling of Current Mirrors 31:15 - PMOS Current Mirrors 36:13 - Current Mirror Examples: PMOS Current Mirrors 41:35 - Current Mirror Examples: Bipolar Current Mirror 46:15 - Problem: Biasing NMOS with NMOS Band-Gap Current Source
from what I learned, remember in electronics I he mentioned the effective channel length Leff < L_designed due to voltage potential at drain, meaning the L-Leff = Xd(Vds). Assume we size transistors with W equal and 2*L1=L2. The actual channel length, however, Leff1=L1-Xd(Vds1), Leff2=2*L1-Xd(Vds2), resulting in 2*Leff1 != Leff2. Ultimately the ratio is not exactly the desired ratio if we size by L. hope that helps :)
When professor drew the first equivalent circuit by shorting two gates at 26:50 , he didn't connected drains with gates by mistake. Or did I misunderstand what he is saying?
Professor, did I miss something? Specifically, you showed an example of using two identical FETS in order to make the current from the mirror FET M1, carry half the current as the reference current source. I am making the assumption that IREF does not change. This would mean that 1/2 IREF is still flowing through each of the M1 and M1' devices. That would mean that Vgs of the two FETs in parallel would be what is causing 1/2 IREF to flow through M2. In that example, you did not mention that manipulation of Vgs was the controlling mechanism for reducing the current in M2. Did I get that right? Great lectures, BTW.
41:10 Can someone tell me why Vg = Vin of the Common Source Amp is sufficient enough so that Vg > Vth so the transistor is "on". Also is the transistor in saturation and why?
In the example around 40 minutes, will the difference in mobility of electrons and mobility of protons cause any difference between the reference I_ref and cloned current I_2?
To my understanding, M1 and M2 are both PMOS devices and hence have the same mobility factor. However, for the NMOS that is in series with the M2, the size(W2) of M2 should be chosen twice~thrice as that of NMOS.
Really nice Lecture, i have maybe one interesting point about Current Mirrors. Maybe you will it address later. The Ground connection of the two transistors, which form the Current Mirror is very important, if you have a difference in resistance it will degenerate the transistors differently. That also can be used to measure currents witch shuts etc.... It is a quite important aspect
At 10:05 , why do we connect the output of the diode-connected transistor to the biasing transistor instead of the amplifying transistor? Does anyone know?
The answer for this is that biasing transistor is acting as a current source here. Bw I also have a doubt in this lecture, that can we connect a nmos diode connected device to give current to a pmos transistor ? And can we supply current source to source of diode connected device instead of its drain ?
@@RaviNagar16 if i interpreting correctly your last doubt is to connect golden source to source the concept is If you connect the current source to the source of the NMOS transistor, the source would no longer be at ground potential, and the gate and drain would both be connected to a higher potential in order to cross threshold mark Vgs-Vth. This alters the behavior of the transistor, requiring careful biasing to ensure proper operation. The current mirror can still function, but the analysis and design become more complex.
Did anyone hear bell at 34:10 ? This video is recorded at his home. Bow down to him for making these videos.
i am just going to comment the same thing but I found u.. LOL :)
Worlds best teachong style, please produce all electeonics lectures which exist till end of universe as a reference
There is o question, He is the best instructor I ever see. Deep understanding, clear explanation.
I am electronic engineer myself.
01:25 - Intro and Review
05:37 - Current Mirror Examples: Multiplying Current
11:46 - Alternative Perspective
15:26 - Current Mirror Examples: Transistors in Parallel
19:33 - Quiz: Sizing Transistors
27:54 - Proper Scaling of Current Mirrors
31:15 - PMOS Current Mirrors
36:13 - Current Mirror Examples: PMOS Current Mirrors
41:35 - Current Mirror Examples: Bipolar Current Mirror
46:15 - Problem: Biasing NMOS with NMOS Band-Gap Current Source
Thank you Sir, By following your classes, I got some confidence to pass my master degree
Your ability to elucidate intricate concepts into readily comprehensible pieces is truly impressive. Thank you for your clear explanation.
You are a brilliant teacher
This is a very good lecture on this topic. Am not sure why it hasn't got many views.
Thank you so much proffesor. Helped a lot to understand and gey imtuition!
27:30 Should the width at the bottom be W1+W1'?(It is written as W1+W2')
Do we use the same L (and W as multiples of one another) only because later on we can make them better match physically?
from what I learned, remember in electronics I he mentioned the effective channel length Leff < L_designed due to voltage potential at drain, meaning the L-Leff = Xd(Vds). Assume we size transistors with W equal and 2*L1=L2. The actual channel length, however, Leff1=L1-Xd(Vds1), Leff2=2*L1-Xd(Vds2), resulting in 2*Leff1 != Leff2. Ultimately the ratio is not exactly the desired ratio if we size by L. hope that helps :)
Beautiful
When professor drew the first equivalent circuit by shorting two gates at 26:50 , he didn't connected drains with gates by mistake. Or did I misunderstand what he is saying?
You are right he should've drawn that.
니가 생각하는거 맞음
God to electronics student
there is no god but Allah stop worshiping humans
Why did someone ring my doorbell at 1:00 a.m.?
why?
Because he/ she is ghost 👻👻. Your are next target🎯🎯🎯.
Professor, did I miss something? Specifically, you showed an example of using two identical FETS in order to make the current from the mirror FET M1, carry half the current as the reference current source. I am making the assumption that IREF does not change. This would mean that 1/2 IREF is still flowing through each of the M1 and M1' devices. That would mean that Vgs of the two FETs in parallel would be what is causing 1/2 IREF to flow through M2. In that example, you did not mention that manipulation of Vgs was the controlling mechanism for reducing the current in M2. Did I get that right? Great lectures, BTW.
very nice
41:10 Can someone tell me why Vg = Vin of the Common Source Amp is sufficient enough so that Vg > Vth so the transistor is "on". Also is the transistor in saturation and why?
Thanks
In the example around 40 minutes, will the difference in mobility of electrons and mobility of protons cause any difference between the reference I_ref and cloned current I_2?
To my understanding, M1 and M2 are both PMOS devices and hence have the same mobility factor. However, for the NMOS that is in series with the M2, the size(W2) of M2 should be chosen twice~thrice as that of NMOS.
Respect 😊
In the example with the source followers what about setting the VGS of the input device?
Really nice Lecture, i have maybe one interesting point about Current Mirrors. Maybe you will it address later. The Ground connection of the two transistors, which form the Current Mirror is very important, if you have a difference in resistance it will degenerate the transistors differently. That also can be used to measure currents witch shuts etc.... It is a quite important aspect
bow down to the brand of analog electronics , The " Behzad Razavi".
why did you use pmos current source at 38:16 example?can it be done using a nmos current sourceas well?
yes
Awesome lecture, thanks
he is my god
there is no god but allah stop worshiping humans
At 10:05 , why do we connect the output of the diode-connected transistor to the biasing transistor instead of the amplifying transistor? Does anyone know?
The answer for this is that biasing transistor is acting as a current source here. Bw I also have a doubt in this lecture, that can we connect a nmos diode connected device to give current to a pmos transistor ? And can we supply current source to source of diode connected device instead of its drain ?
@@RaviNagar16 if i interpreting correctly your last doubt is to connect golden source to source the concept is If you connect the current source to the source of the NMOS transistor, the source would no longer be at ground potential, and the gate and drain would both be connected to a higher potential in order to cross threshold mark Vgs-Vth. This alters the behavior of the transistor, requiring careful biasing to ensure proper operation. The current mirror can still function, but the analysis and design become more complex.
what is the name of this song?
I love u holy
Hello Sir, whats the Vds of M2??
@ 12:50
Dear sir ...what is value of Vout at 39:09.
It is a CE stage with current source load, Vout=-gm*ro*Vin.
36:10
No voice 🥺
47:00 bjt