This right here is REAL education on digital logic. This is REAL engineering right here. This is why we major in engineering, to actually understand what we're learning properly. Im so grateful. Thank you & prosper!
This right here is REAL education on digital logic. This is REAL engineering right here. This is why we major in engineering, to actually understand what we're learning properly. I'm so grateful. Thank you & prosper!
found this statement useful to share: Under normal conditions, both inputs of the latch remain at 0 unless the state has to be changed. The application of a momentary 1 to the S input causes the latch to go to the set state. The S input must go back to 0 before any other changes take place, in order to avoid the occurrence of an undefined next state that results from the forbidden input condition.(from mano digital design)
Thank you very much for your tutorial. I am struggling in my digital design class and I can't understand reading my textbook and your tutorial save me from failing my class.
I am from iit Roorkee and our professor sudeb Das Gupta can’t explain basic concept’s properly 😢 though he is knowledgeable he teaches us thinking that we know stuff and btw I am from computer science engineering branch
Ya, my exam is tomorrow morning and instead of going over the review sheet, I'm just watching these instead. It's easier to understand and it worked better for the last exam so, round 2 my dudes
Your videos are really great! It helps me a lot in my academics. Thanks a lot! But a humming low noise in this video is really distracting and annoying.
Triggering Methods: There are two Methods, Level and edge Triggering When the memory element changes with respect to a high value of clock signal, it's called the level method while when the memory element changes when the clock signal changes from either low to high(Positive edge) or high to low(Negative edge). It is called edge Method.
what changes the state in the memory element. Is it control signal(clock) or the input and previous state ?....in the last lecture he explained that clock ip triggers the flipflop to work at a perfect time not randomly so i think it will not change the state alone ...based on input , previous state if the clock is high memory state will change in the flip flop ...am i right? if wrong please advise
What is the advantage of the clock. Suppose we have an output when clock is low, it will be lost and next time the input comes, it will have output from previous instead of this output
It would very helpful, when there is a number of the lecture, directly after the name of the lecture. For example: Triggering Methods in Flip Flops (Lecture 122)
This right here is REAL education on digital logic. This is REAL engineering right here. This is why we major in engineering, to actually understand what we're learning properly. Im so grateful. Thank you & prosper!
NESO ACADEMY is the best choice to learn DIGITAL ELECTRONICS
Specially before exam
😂😂 avnu avnu
True✨💯💯💯💯
Gate smasher>>>>>>3
I've stopped going to my electrical engineering class in favor of watching these videos. You do a better job.
Same here exactly...
great contents...awesome
KABHI TO CHALA JAYA KAR ATTENDANCE KAT JAYEGA
your videos saved me from failing my digital electronics class. I stopped going because you explain everything million times better. Great work!
These videos are hands down the best way to learn digital logic.
This right here is REAL education on digital logic. This is REAL engineering right here. This is why we major in engineering, to actually understand what we're learning properly. I'm so grateful. Thank you & prosper!
found this statement useful to share:
Under normal conditions, both inputs of the latch remain at 0 unless the state has to be changed. The application of a momentary 1 to the S input causes the latch to go to the set state. The S input must go back to 0 before any other changes take place, in order to avoid the occurrence of an undefined next state that results from the forbidden input condition.(from mano digital design)
me in 2k24...And your lectures are n number of times better than what I am gettinga in the class...Have a great future ahead sir..
Thank you very much for your tutorial. I am struggling in my digital design class and I can't understand reading my textbook and your tutorial save me from failing my class.
Your videos are great.
P.S. It would be nice if you could add the lecture numbers in the video titles and their descriptions.
These lectures are great source of knowledge . Thnx man . Keep doing the great work
Seriously the best ways to finish digital electronics
I love how he makes everything seem simple when he says its nothing but...
When i pass my DL exam it will definitely because of your videos. God bless you.
Thank you very much sir, I was waiting to listen this voice for 2 month , now I'm very happy.
Sir your wonderful lectures to understand the digital electronics. Your way of teaching is very good . Thank you very much Sir
Grazie.
Thank you sir, this is a big opportunity for us to understand the lectures and i consider you as a supreme leader :)
You have actually made me to start understanding this topic
you are abesome!!!
The way you expalin things is phenomenal.
thank you!
Thankd for sharing your electronics knowledge.
It is very useful ❣️
I don't know why I am paying 1.5 lakh per sem to IIT for nothing. When there is a hundred times better content here. Harsh Reality........
Which iit bro ?
What bro u r telling which iit?
@@Kishore_physics_lover yeah bro which iit means iit M, iit B, iit kgp in that way
I am from iit Roorkee and our professor sudeb Das Gupta can’t explain basic concept’s properly 😢 though he is knowledgeable he teaches us thinking that we know stuff and btw I am from computer science engineering branch
@@Viggu474 oh, i can understand it
Great Lectures Sir!!!
Please keep up the good work..
thanks for your support
TRIGGERED
OzymandiasTV lol
😂😂😂😂😂😂😂
@@krittikabiswas8500 kya
The best channel for learning Digital Electronics is NA.
Amazing lectures sir they are very helpful 😊
lots of love for neso :)
You r the best tutor sir...
it's really amazing to get such a precious lectures. thank you very much...The best one..🦁
you really do a great job i would pay my fee to you rather than my professor he is getting paid for nothing
preach
Thanks for the videos i am preparing my tomorrows paper ...
same bro👀👀😆
Great classes
Very nice lecture, sir...
Now am getting an full interest on topic and you explain it very clearly,flawlessly. Your voice is enough to memorize an imp. Point
Memory can also be called as registers- they collect the inputs of flip-flops.
Your videos are great.
Your video series of Digital Electronic is best!!! DAMN Daniel!!!!
Thanks
Thank you
his videos proves quantity over quality
East or West Neso is the best
This videos are 9 yrs old, wth 😭, AWESOME
Ya, my exam is tomorrow morning and instead of going over the review sheet, I'm just watching these instead. It's easier to understand and it worked better for the last exam so, round 2 my dudes
Thank you very much sir🥳🥳🥳🥳
Thank you sir
YAY you make my life easier haha , this is a life saver
so simple to understand
I'm remembering the Alfred Hitckock movie Dial M for murder whenever he says Latch..😂
Your videos are really great! It helps me a lot in my academics. Thanks a lot!
But a humming low noise in this video is really distracting and annoying.
THANK YOU SIR
To everyone saying he is good and how he has helped you also donate money , the link is in the description . ( Yes I already did it )
Thanks Sir 😃😃
where is lecture #121? thanks!!
Triggering Methods:
There are two Methods, Level and edge Triggering
When the memory element changes with respect to a high value of clock signal, it's called the level method while when the memory element changes when the clock signal changes from either low to high(Positive edge) or high to low(Negative edge). It is called edge Method.
Amazing lectures brother. Love you for them. I burst out laughing whenever you said edge, it sounds like ass. Positive ass , negative ass xD
Deveesh Mehandiratta positive ass and negative ass😂😂😂
He's actually saying Ass!
Amazing video
ur explain all the lec in good way
thank u sir
Good work sir,
pls explain rhe triggered ff by using graphs .And explain hold time ,frequency etc topics also.👍
thanks sir for giving this video
Thanks for your video.
Brilliant.
good job
lecturs are too good and helpful for exams
What is the duty cycle during edge triggering? Can someone explain
Sir can you please explain why negative edge triggering used always than positive??
can you please explain about TRISTATE logic related to clock ???
Is clock pulse always applied to memory?
Sir where is lecture no 121??
Even I want the link of lect no. 121
I am unable to find lecture no. 121 , please send the link..
Why should we use triggering
So the Memory is just a latch/flipFlop?
Thanks ...
please provide microprocessor tutorials
you're the best Indian RUclipsr
explain postive and negative edge trigger flip flop in detail also
I need to know how edge triggering is achieved by CLK pulse
Do we use feedback in combinational circuits also??
thank u!
What happens when level trigger occurs, is transition takes place or state change
Can you please explain difference between clock and square wave?
what changes the state in the memory element. Is it control signal(clock) or the input and previous state ?....in the last lecture he explained that clock ip triggers the flipflop to work at a perfect time not randomly so i think it will not change the state alone ...based on input , previous state if the clock is high memory state will change in the flip flop ...am i right? if wrong please advise
What is the advantage of the clock. Suppose we have an output when clock is low, it will be lost and next time the input comes, it will have output from previous instead of this output
It would very helpful, when there is a number of the lecture, directly after the name of the lecture. For example: Triggering Methods in Flip Flops (Lecture 122)
Is there actually time gap between low and high transition🤔
you beauty you are awosome
you are doing great job i really enjoy your tutorials
Sir plzzz upload videos on electrical machine -2 🙏
thnk u so much
what means, switch from one state to another state, and transition in our memory element...
Does the transition occurs only once or multiple times during whole triggering period Could you please explain in detail?
Why edge triggered is preferred over level triggered?
lecture no. 121?
you deleted?
I'm not getting?
122 is after 120 i.e clock right?
yeh I did same...but 121 is not there in sequence.
thank you sir...
lectures are too good...
@@nesoacademy some parts seems to be missing in the whole playlist like DEMUX tree, Latches ,etc
what is transition in memory element?? please explain me in detail
Is pulse triggering same as level triggering
+Neso Academy in level triggering does the transition happen many times in one level ??
Does the transition occurs only once or multiple times during whole triggering Could you please explain in detail?
what is a control input again big boss
Do we have to design Clk Source to achieve edge triggering pulse?
My question is logial diagram of level Triggered flipflop and edge triggered Filip flop same or not