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Honestly as someone who spent last year studying different CPUs and ISAs, for me it looks more like old CISC rather than RISC. From my experience, it's normal for RISC to have lots of register (usually between 16 and 32), no direct stack or memory manipulation, only with load/store. Also RISC CPUs (again from my experience) literally always have fixed size instructions. So it looks more like MISC ISA. Still very cool and educational project though!
just to let you know, there are actually RISC architectures that have variable instruction lengths, like RISC-V, ARC and blackfin! it's not really a true requirement to label something as RISC or not, just a design choice that happens to work out well for a lot of RISC architectures nonetheless. but i agree, the lots of registers is very traditionally RISC
@@direct3d I forgot about compressed extension, even though I've specifically deeply looked into RISC-V 😅 If that's what you meant. Still, in my opinion, compressed ISA has same size no matter what's instruction it is, while this Excel ISA, and CISC instructions can have differently sized instruction depending on argument size. Also I don't really know about strict definitions, my comments are based on how I felt rather than formal rules.
@@direct3d Personally, it's an old intuition from building toy CPUs, but I practically categorize CISC and RISC based on fabrication cost & complexity. VLA greatly complicates control hardware, for example in branch prediction and cache management given it necessitates decoding to determine instruction bounds. It's my intuition that RISC generally simplifies the core pipeline as much as possible, and you see that reflected in chips costs. Looking up RISC-V's C extension, feeling the same as kala-telo, the manual itself says implementers can simply expand compressed instructions to full length form before execution - which is exactly what I would expect to keep hardware as simple as possible. (Also found some FOSS RISC impls with expansion logic) Having many registers to make up for the otherwise simplified core ISA makes perfect sense to me, it's less of a given spec and more of a natural requirement.
@@GRAYgauss yup, love the way you explained this also! deeply agree on your point with simplifying the pipeline -> cost reduction, i totally see what you're getting at. and yup with the RISC-V extension, it makes perfect sense to me as well, it's fun to think about how much thought was put into such a piece of the ISA anyway. i think ARM goes a bit crazy with the extensions as well, to the point that i've questioned whether it also shall still fall under the RISC umbrella. haha. (and since i haven't said so already, amazing video and awesome creation inkbox!!)
As someone who has designed a microprocessor with a Super-RISC instruction set, while it's easier to design, when programming in assembly you regret your decisions sorely.
I've noticed several youtubers making very simple computers tend to still have ALU flags. This is actually not even necessary! You can perform simple comparison operations instead. For example, in RISC-V you have branch instructions for equals, not equals, etc., and you have an ALU operation to set a register to the boolean value of a less than comparison. You can actually make things like overflow checking using these simple instructions. Keep in mind that there is actually only one opcode for ALU and one for branching, all the rest is done via a few extra bits. There are even a bunch of convenience pseudoinstructions like SEQZ or BEQZ (to check if a register is zero for example), so that it still feels as if you have all the comparison operators
I have an interesting ultra-reduced instruction set, the MCPU instruction set! I've built in in LogiSim, Digital, and recently in Minecraft. Fundamentally, it has only 2 instruction types, and 3 fundamental instructions: (conditional) move(MOV/CMOV) and shift/load immediate value(IMM). It's basically a simple TTA-like design, in the sense that the program counter is just like every other register on the bus, so is the current RAM address, the ALU, and the immediate register. It requires no general-purpose registers(but has space for up to 3 in it's instruction set). One cool feature of my design is that this 8-bit fixed-size instruction set works with any bus-width, even with the same program, by using the IMM instruction to shift in a larger immediate value 7 bits at a time. It's convenient to program as well, the assembler still feels familiar and not like a turing tarpit! The complete instruction set is so simple, it fits in the remainder of this comment: If the highest bit is set, the instruction is an IMM instruction. Remaining bytes are loaded into SRG_IMM register on first instruction, or shifted in on successive instructions. Otherwise, if the second highest bit is set, the instruction is a conditional move(CMOV) and only runs if the ALU flag output is set, if not set it's a regular move(MOV) and always runs. Remaining bits are a 3-bit source and a 3-bit target. Sources: PC, ADDR, RAM, IMM, ALU, I, J, K. Targets: PC, ADDR, RAM, ALU_A, ALU_B, I, J, K. I,J,K are optional general-purpose registers. ALU_A and ALU_B are ALU registers(can only be read as ALU result). IMM is the last decoded immediate value, RAM reads/writes at address provided by ADDR. (It's so simple, I actually can decode/encode/run instructions in my head :P) I would really like any feedback, I have little experience and no formal training :P
I dont know much about this stuff, but what i know is... HOW DID U LEARN THIS??? This shi is so unbelivable cool, i had to read ur comment a few times until i got it. I want to see it so mad. Pretty cool.
@@DoDoBoy-nh1jt If you just want to see it, there is my open-source web-based assembler and emulator(can't post link here). But you can definitely learn all this for yourself, after all I'm self-taught as well! :P In general, learning enough about logic gates to be able to understand how a computer works(or build one in Excel or Minecraft) isn't that complicated. You need some basic understanding of programming(what is code, how does it run?), logic gates(how can you combine multiple binary inputs into binary outputs?), and CPU architecture(what parts of a CPU are required to execute any program?). If you have any more specific questions, let me know! In general, just try some things in a logic simulator, possibly fail, and repeat ;P I also have some videos about my specific CPU on my channel, including a video where I design a simple CPU in LogiSim(the video is called "LogiSim Hello-world CPU design!").
@@ALG397 Oh, and I've also got a video where I design and build a simple CPU in LogiSim that is somewhat similar to the MCPU instruction set. It has no audio narration, but I explained what I did in text on the right side. The original recording was about an hour, but the video is speed up 2x(30min), but contains otherwise no editing. It contains some mistakes and debugging, but the basic design is fine and very similar. Technically my architecture can be considered TTA-like(transport-triggered architecture), but it's very much not VLIW, and suports only a single source and target(untypical for TTAs) at a time, and the IMM instruction also doesn't fit the TTA description. MCPU architecture is not my first iteration on a design like this, I've played around with LogiSim and Digital a lot to figure out what architecture features I want/need. I've also played with Minecraft redstone a bit, discovering that basically a stacking height of 2 is always enough, because you can "cross" wires in 2 high, which is somewhat like the WireWorld cellular automata(which has a really cool CPU design for it! My favorite in any CA! Look up WireWorld Computer!), which I also played around with earlier, which lead me to realize that I could build an instruction set that could work on any word width, and that could be created in layers that only need to be connected to the previous/next layer(important for building compactly in Minecraft; This basically means the data path is completely 2D in Minecraft), but also means this is probably easier to implement serially(important for WireWorld) or in other creative ways like shaders etc.
Interesting that your "better" CPU is technically wayyy less powerful, but its much cleaner and faster, making it more effective. Goes to show how "better" in the regular CPU market is also more complex than just "has bigger registers".
after completing the Nand game, aka building from nand gates processor with 2 general purpose registers, program counter, ALU and programming some basic stuff for it I'm absolutely sure that anything less than 6502 is a pure masochism. It is pain to program for, it is absolutely not hard to design 6502 clone even on logic gates level, so reducing instruction set is really not a great idea here.
why tf did those 11 people have the audacity to downvote such a video?!??? like what did this guy ever do to you? or do you just hate excel? do you just hate cpus? what's wrong!!
Dude, this is fucking sick, like, you just casually dropping that not only can code in assembly but in a modified assembly at that? you crazy dog that's some good work!
What do you mean by modified assembly? It's not like there's one true form of assembly because every architecture has its own assembly language. Also, it's effectively impossible to create a CPU architecture without understanding how its instructions work and therefore how to use its assembly language
@@TheRenegade... My dog I apologise I was less than sober when I watched this video and as an amateur programmer at best all I know is assembly is hard and he said something about "and so I wrote my own parts of an assembly language" or something along those lines and I was impressed if not just misunderstanding what he meant, anyway I take your point I just know doing really custom memory control and stuff is hard so I applaud what he did
I'm fascinated by this! I'd love to see a compiler made to turn something higher level like C into your ASM that's compatible with your excel CPU. I don't have much idea of how difficult that must be, though.
8:43 You could have the top address space point to block 0, leaving the lower 128 for the swap memory. Might make it easier to program without having to think about adding 128 every time you want to access memory
Well done. I did something similar in Amiga Basic some many years ago simulating the 8085 intel. But your project is quite good! But now you gave me an idea for a hardware implementation of the RISK processor. Hmmm.. Anyway I enjoyed your video very much. Keep up the great work!!! Looking forward to see your next project
Is the flip/jump machine actually turing complete? I'd love to see that used to implement some simple algorithms / maybe a logical proof if that's possible. Is there such a proof for turing completeness? Edit: btw I love this kind of stuff. I personally wrote a simple cpu in logisim and wrote a recursive factorial program in its machine code. You've earned my sub.
Awsome! I really need to implement this in PowerPoint, but adding a screen absolutely destroys the performance. I'm currently rewriting a subset of PowerPoint in Rust to hopefully run this king of slides blazingly fast.
Is there a way to do something like the Linux shebang with Windows cmd.exe ? Or would you have to wrap it in a batch file? It just seems kind of annoying to have to manually call the Python interpreter to execute a program instead of just calling the program directly and having the shell figure it out. And in case anyone doesn't already know, yeah there are builds of various Linux shells that can be used on Windows, including a full set from either MingW or CygWin, but I'm wondering about solutions that don't use third-party tools.
One of the selling points for RISC CPUs is that they are designed to be programmed by compilers, not assemblers --- so convenience to the programmer is unnecessary. If your CPU were aimed at the real world, part of your design job would be to write a simple compiler for it, later to be made into a sophisticated optimizing compiler for production.
This we really needed, after last week's global political events. Suggestion: The stack will still function as a stack even if it is upside down. The logic can be done TOP DOWN and then the representation BOTTOM UP. Putting it off to the side on column Z, the representation could be R_13 = Z_28 R_14 = Z_27 ... etc. Great JOB!
It's just coincidence. I just looked him up, and he looks like he's doing some impressive stuff in minecraft. I guess on such a low level all computers really work the same way.
I thought about doing something like this in excel as well a while ago... but im more of a hardware guy and so i never startet doing it... great idea and video btw...
Hello, Is it possible for a virtual processor to run faster than the processor it is running on? This is of course if we build a virtual processor that runs faster than the real processor our virtual processor is running on If it is impossible, what is the purpose of programming a virtual CPU?
Im not really clued up but, this system you are making, reminds me of how a NES works. It would be cool if you could make a simple game. Perhaps something like a gameboy. You might be able to run doom then
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With clock you just had to do clock = 1 - clock, if it was 0 1-0 is 1, i it was 1 1-1 is 0
In Excel, 0-1 is -1, but I could do clock = ABS(Clock - 1)
@@InkboxSoftware you would never get into a state of 0-1
@@InkboxSoftware read my comment it says clock = 1 - clock
Woops, sorry read it backwards. Yeah that would be a good optimization.
Interviewer : so how good are you with excel ?
This mf : YES
doubt he ever needs a job where you need to use excel
@stifskere7220 this mf works in AMD ryzen cpu factory lol
This mf: "tf you mean? Excel is my BITCH"
Software engineer students: Why am I getting job no offers? What is their standard?
This RUclips video:
LOL "I wrote my own"
Now make it run DOOM
Calm down were getting there at some point
you beat me to it
"Doom compiled to run in excel-spreadsheet" sounds interesting!
He is going to lose his mind 😂
57 seconds ago?!?! @@parthasarathyvenkatadri
Next video: "I built a CPU in Minecraft running on my RISC CPU in Excel"
Like it runs for 10k hours tp get 3+5 correct 😂😂
… then have it run Doom
@@ShaheenGhiassy Run doom on everything. Always!
Done with an x86 to RISC interpreter running Linux Mint.
Honestly as someone who spent last year studying different CPUs and ISAs, for me it looks more like old CISC rather than RISC. From my experience, it's normal for RISC to have lots of register (usually between 16 and 32), no direct stack or memory manipulation, only with load/store. Also RISC CPUs (again from my experience) literally always have fixed size instructions. So it looks more like MISC ISA. Still very cool and educational project though!
just to let you know, there are actually RISC architectures that have variable instruction lengths, like RISC-V, ARC and blackfin! it's not really a true requirement to label something as RISC or not, just a design choice that happens to work out well for a lot of RISC architectures nonetheless. but i agree, the lots of registers is very traditionally RISC
@@direct3d I forgot about compressed extension, even though I've specifically deeply looked into RISC-V 😅 If that's what you meant. Still, in my opinion, compressed ISA has same size no matter what's instruction it is, while this Excel ISA, and CISC instructions can have differently sized instruction depending on argument size. Also I don't really know about strict definitions, my comments are based on how I felt rather than formal rules.
@@direct3d Personally, it's an old intuition from building toy CPUs, but I practically categorize CISC and RISC based on fabrication cost & complexity. VLA greatly complicates control hardware, for example in branch prediction and cache management given it necessitates decoding to determine instruction bounds. It's my intuition that RISC generally simplifies the core pipeline as much as possible, and you see that reflected in chips costs. Looking up RISC-V's C extension, feeling the same as kala-telo, the manual itself says implementers can simply expand compressed instructions to full length form before execution - which is exactly what I would expect to keep hardware as simple as possible. (Also found some FOSS RISC impls with expansion logic) Having many registers to make up for the otherwise simplified core ISA makes perfect sense to me, it's less of a given spec and more of a natural requirement.
Wholeheartedly agree with your intuition, but it's also just my gut.
@@GRAYgauss yup, love the way you explained this also! deeply agree on your point with simplifying the pipeline -> cost reduction, i totally see what you're getting at. and yup with the RISC-V extension, it makes perfect sense to me as well, it's fun to think about how much thought was put into such a piece of the ISA anyway. i think ARM goes a bit crazy with the extensions as well, to the point that i've questioned whether it also shall still fall under the RISC umbrella. haha. (and since i haven't said so already, amazing video and awesome creation inkbox!!)
Its like jumping from 16nm to 4nm, such generational leap to have 15x faster CPU! Nice job
As someone who has designed a microprocessor with a Super-RISC instruction set, while it's easier to design, when programming in assembly you regret your decisions sorely.
I'm glad I found someone who understands me
@@InkboxSoftware did you thing about writing your own compiler?
“It’s even funnier the second time!”
I've noticed several youtubers making very simple computers tend to still have ALU flags. This is actually not even necessary! You can perform simple comparison operations instead. For example, in RISC-V you have branch instructions for equals, not equals, etc., and you have an ALU operation to set a register to the boolean value of a less than comparison. You can actually make things like overflow checking using these simple instructions. Keep in mind that there is actually only one opcode for ALU and one for branching, all the rest is done via a few extra bits. There are even a bunch of convenience pseudoinstructions like SEQZ or BEQZ (to check if a register is zero for example), so that it still feels as if you have all the comparison operators
I have an interesting ultra-reduced instruction set, the MCPU instruction set! I've built in in LogiSim, Digital, and recently in Minecraft.
Fundamentally, it has only 2 instruction types, and 3 fundamental instructions: (conditional) move(MOV/CMOV) and shift/load immediate value(IMM). It's basically a simple TTA-like design, in the sense that the program counter is just like every other register on the bus, so is the current RAM address, the ALU, and the immediate register. It requires no general-purpose registers(but has space for up to 3 in it's instruction set).
One cool feature of my design is that this 8-bit fixed-size instruction set works with any bus-width, even with the same program, by using the IMM instruction to shift in a larger immediate value 7 bits at a time. It's convenient to program as well, the assembler still feels familiar and not like a turing tarpit!
The complete instruction set is so simple, it fits in the remainder of this comment: If the highest bit is set, the instruction is an IMM instruction. Remaining bytes are loaded into SRG_IMM register on first instruction, or shifted in on successive instructions. Otherwise, if the second highest bit is set, the instruction is a conditional move(CMOV) and only runs if the ALU flag output is set, if not set it's a regular move(MOV) and always runs. Remaining bits are a 3-bit source and a 3-bit target. Sources: PC, ADDR, RAM, IMM, ALU, I, J, K. Targets: PC, ADDR, RAM, ALU_A, ALU_B, I, J, K.
I,J,K are optional general-purpose registers. ALU_A and ALU_B are ALU registers(can only be read as ALU result). IMM is the last decoded immediate value, RAM reads/writes at address provided by ADDR.
(It's so simple, I actually can decode/encode/run instructions in my head :P)
I would really like any feedback, I have little experience and no formal training :P
I dont know much about this stuff, but what i know is... HOW DID U LEARN THIS??? This shi is so unbelivable cool, i had to read ur comment a few times until i got it.
I want to see it so mad.
Pretty cool.
@@DoDoBoy-nh1jt If you just want to see it, there is my open-source web-based assembler and emulator(can't post link here).
But you can definitely learn all this for yourself, after all I'm self-taught as well! :P
In general, learning enough about logic gates to be able to understand how a computer works(or build one in Excel or Minecraft) isn't that complicated.
You need some basic understanding of programming(what is code, how does it run?), logic gates(how can you combine multiple binary inputs into binary outputs?), and CPU architecture(what parts of a CPU are required to execute any program?). If you have any more specific questions, let me know! In general, just try some things in a logic simulator, possibly fail, and repeat ;P I also have some videos about my specific CPU on my channel, including a video where I design a simple CPU in LogiSim(the video is called "LogiSim Hello-world CPU design!").
@@Maxjoker98 can u send me the link pls, i want to try this out. Why cant u send the link? Is it cuz the RUclips algorythm is gonna delete it?
@@Maxjoker98 I visited your RUclips channel and I did not find an educational explanation like the one on this channel. Can you send me the link?
@@ALG397 Oh, and I've also got a video where I design and build a simple CPU in LogiSim that is somewhat similar to the MCPU instruction set. It has no audio narration, but I explained what I did in text on the right side. The original recording was about an hour, but the video is speed up 2x(30min), but contains otherwise no editing. It contains some mistakes and debugging, but the basic design is fine and very similar. Technically my architecture can be considered TTA-like(transport-triggered architecture), but it's very much not VLIW, and suports only a single source and target(untypical for TTAs) at a time, and the IMM instruction also doesn't fit the TTA description.
MCPU architecture is not my first iteration on a design like this, I've played around with LogiSim and Digital a lot to figure out what architecture features I want/need. I've also played with Minecraft redstone a bit, discovering that basically a stacking height of 2 is always enough, because you can "cross" wires in 2 high, which is somewhat like the WireWorld cellular automata(which has a really cool CPU design for it! My favorite in any CA! Look up WireWorld Computer!), which I also played around with earlier, which lead me to realize that I could build an instruction set that could work on any word width, and that could be created in layers that only need to be connected to the previous/next layer(important for building compactly in Minecraft; This basically means the data path is completely 2D in Minecraft), but also means this is probably easier to implement serially(important for WireWorld) or in other creative ways like shaders etc.
As a an older person who grew up in the 8 and 16 bit PC era I am absolutely amazed at this.
I love that you used flipjump as an example of a OISC instead of subleq
what the heck that's mindblowing, as someone who barely started getting into risc and how cpus works.
Interesting that your "better" CPU is technically wayyy less powerful, but its much cleaner and faster, making it more effective.
Goes to show how "better" in the regular CPU market is also more complex than just "has bigger registers".
This is sick af! Love your dedication and enthusiasm!
after completing the Nand game, aka building from nand gates processor with 2 general purpose registers, program counter, ALU and programming some basic stuff for it I'm absolutely sure that anything less than 6502 is a pure masochism. It is pain to program for, it is absolutely not hard to design 6502 clone even on logic gates level, so reducing instruction set is really not a great idea here.
Build llvm backend. There you go. Now you can even run c++.
why tf did those 11 people have the audacity to downvote such a video?!??? like what did this guy ever do to you? or do you just hate excel? do you just hate cpus? what's wrong!!
Google sheet lovers 😬
Dude, this is fucking sick, like, you just casually dropping that not only can code in assembly but in a modified assembly at that? you crazy dog that's some good work!
What do you mean by modified assembly? It's not like there's one true form of assembly because every architecture has its own assembly language. Also, it's effectively impossible to create a CPU architecture without understanding how its instructions work and therefore how to use its assembly language
@@TheRenegade... My dog I apologise I was less than sober when I watched this video and as an amateur programmer at best all I know is assembly is hard and he said something about "and so I wrote my own parts of an assembly language" or something along those lines and I was impressed if not just misunderstanding what he meant, anyway I take your point I just know doing really custom memory control and stuff is hard so I applaud what he did
This is incredible. I'm in a computer architecture class in university so I can actually follow along!
Just curious where even the heck you guys find information is there any book that explains how computer works bit by bit if there is please suggest
Computer Architecture: A Quantitative Approach, by David A. Patterson and John L. Hennessy
I'm fascinated by this! I'd love to see a compiler made to turn something higher level like C into your ASM that's compatible with your excel CPU. I don't have much idea of how difficult that must be, though.
8:43 You could have the top address space point to block 0, leaving the lower 128 for the swap memory. Might make it easier to program without having to think about adding 128 every time you want to access memory
After programming the machine for a bit, I do think that's probably the smarter way to do it
Well done. I did something similar in Amiga Basic some many years ago simulating the 8085 intel. But your project is quite good! But now you gave me an idea for a hardware implementation of the RISK processor. Hmmm.. Anyway I enjoyed your video very much. Keep up the great work!!! Looking forward to see your next project
Flashback to computer architecture class in college 😭😭
At 2:45 I'm pretty sure BLT and BGT are inverted (> is gt and < is lt but you put > lt and < gt)
Woops I did
This is crazy of you but keep it up man
lovely video, very impressive!! thank you for the captions :)
Gahh! I love this project!!
Any plans to write a compiler to your new assembly?
That was in the video...
Is the flip/jump machine actually turing complete? I'd love to see that used to implement some simple algorithms / maybe a logical proof if that's possible. Is there such a proof for turing completeness?
Edit: btw I love this kind of stuff. I personally wrote a simple cpu in logisim and wrote a recursive factorial program in its machine code. You've earned my sub.
It's on the esolang wiki. There's actually been a lot of effort put into it, it's pretty cool
0:17 "basically the excel equivalent of a computer from the 1950s"
Well, it got us to the moon, didnt it?
you should try remaking the mos 6502 for some extra power
3:26 when I heard this I knew it was brilliant
Actual insanity, good job.
Awsome! I really need to implement this in PowerPoint, but adding a screen absolutely destroys the performance. I'm currently rewriting a subset of PowerPoint in Rust to hopefully run this king of slides blazingly fast.
maybe try the sieve of Eratosthenes and find some prime numbers. Seems like a good job for a home made CPU.
Absolutely brilliant.
im trying to make my own cpu in excel but i cant get the clock to work w/ the previous video's method
I saw the original video and didn't understand anything, I learned logisim and now it's so super simple!
i think it would be an interesting project to try and write a C compiler for the language
Outstanding work!
I've used Excel 2000 to simulate circuits before in my Digital Design class, so I will give a like without knowing the content of this video 🙃
@1:46 You almost reinvented 6502 or '90 PIC microcontroller
Is there a way to do something like the Linux shebang with Windows cmd.exe ? Or would you have to wrap it in a batch file? It just seems kind of annoying to have to manually call the Python interpreter to execute a program instead of just calling the program directly and having the shell figure it out. And in case anyone doesn't already know, yeah there are builds of various Linux shells that can be used on Windows, including a full set from either MingW or CygWin, but I'm wondering about solutions that don't use third-party tools.
You should make a LLVM compiler for it
Can't you do it in Libre Office instead?
Haha good luck. I use LibreOffice all the time, but stability is not very good for big things 😢
Inkbox in 2050: today we’re going to run excel in excel
wow. seems ideal for you to implement a forth compiler.
Try to undervolatage, maybe will run wirh faster clock 🤣
Clean job, congratulations.
waiting for this man to create and entire pc in exel, that can play doom
Can you imagine explaining to people the contortions you'd have to go through to make the register 64 bits? No one would believe you!
this is excactly what I currently studdy in school
One of the selling points for RISC CPUs is that they are designed to be programmed by compilers, not assemblers --- so convenience to the programmer is unnecessary. If your CPU were aimed at the real world, part of your design job would be to write a simple compiler for it, later to be made into a sophisticated optimizing compiler for production.
One day this computer would be able to run execel in itself, or at least doom
Babe wake up, Inkbox just uploaded a new Excel video
I NEED TO SEE SOMEONE BUILDING AN OS FOR THIS THING RN
Does it run Doom tho? Also, we got CPU running on MS Excel b4 GTA 6.
4:30 can be further simplified to D6 + C2, but I know this example is a toy problem demonstrating how to get rid of the If function.
That your ranges are unnamed is just … I … … it‘s hard to deal with this, you know?
He did it again
I have not got a clue what he did, but I can tell he did it in a smart way and it was good.
If it only took 4% footprint of previous one, that means you can give it 20 times more memory and a bigger screen...
This we really needed, after last week's global political events.
Suggestion:
The stack will still function as a stack even if it is upside down.
The logic can be done TOP DOWN and then the representation BOTTOM UP.
Putting it off to the side on column Z, the representation could be R_13 = Z_28 R_14 = Z_27 ... etc.
Great JOB!
I understand like half but this is cool
Now make a GPU in excel
I think will be cool if you load some sort of program in to equal ic, like micro 8-bit processor
I wonder if it would run even faster if you ran it on a really old version of excel.
Plot twist: He becomes a professional solderer and makes the CPU a real object instead of just a spreadsheet
seeing some similarities between this computer and mattbatwings's ongoing series' computer. did you get inspired by that or is it just a coincidence?
It's just coincidence. I just looked him up, and he looks like he's doing some impressive stuff in minecraft. I guess on such a low level all computers really work the same way.
something strange look at the first ccomment is the same
It should run android right
It shouldn't
sometime in the 1950s : " we are going to simulate a CPU in excel "
"a what? "
"what? "
I thought about doing something like this in excel as well a while ago... but im more of a hardware guy and so i never startet doing it... great idea and video btw...
And I thought making Tic Tac Toe in Excel (no vba) was impressive
Somehow, it ended up on my main page; I don’t understand anything, but I watched the whole thing, and it was fun.
every nine month, the excel CPU gets 10 time faster
Now make it run half life 1
Can it run doom tho?
yay another electronic in excel
Brilliant! You truly are a genius.
babe wake up, there's a new Inkbox video
you think your computer was just like watching you do this and went "hey.. there's something familiar about this"
If possible, do you think you are ever going to make a fully functioning computer along an operating system within excel?
Not anytime soon, but never say never.
Hello,
Is it possible for a virtual processor to run faster than the processor it is running on? This is of course if we build a virtual processor that runs faster than the real processor our virtual processor is running on
If it is impossible, what is the purpose of programming a virtual CPU?
YOOO THE RETURN
You know what you have to do now.
DOOM. Bad Apple. In the Excel computer.
1:26 The swap instruction is sexy XD
Only BGE..
This dialect of assembly is so cursed
Any interest in creating a flip/jump (or BF) interpreter for your SRISC computer?
so now we can compile porth down to excel cpu intruction set? cool
you should make a gpu for the cpu
Now add some worksheets to make it multi-core!
hell yeah, we love risc
This is so cool, clever use of smaller footprint! Coming from discord server
Im not really clued up but, this system you are making, reminds me of how a NES works.
It would be cool if you could make a simple game. Perhaps something like a gameboy. You might be able to run doom then
imagine you make a CPU in excel more powerful that your actual CPU.
Tennis for NES, very cool
Now make it a PowerPC and make it run MacOS 10.5.9 Sorbet Leopard Custom Build
Can it run Blodborn on PC?
@ no, it’s power pc you fool. It can’t even run Minecraft 1.20
Make a Risc-V instead, that is doable with only the base 47 instuctions.
@@MarquisDeSang No Thanks
now make a 32 bit CPU powerful enough to run windows xp
“Hey dude, nice computer, what are your specs?”
“64 gb ram, 2TB SSD, RTX 4070 plus and the best part: *Excel CPU* “
2:44 good’ay mate
"just how reduced can an instruction set be?"
SUBLEQ enters the chat
(wouldnt make for a very good programming experience though)
Oh, is that subleq propaganda in the wild? Love to see it!