MOD 12 Ripple up Counter Using T flip flop | Wave form for MOD 12 asynchronous counter
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- Опубликовано: 16 июл 2022
- #digitalelectronics
#digitalsystemdesign
#counter
design Mod 12 ripple up counter using T flip flop
timing diagram for mod 12 asynchronous counter
wave form for mod 12 ripple counter
state diagram for mod 12 counter
state table for mode 12 counter
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Very Imfomative Video Ma'am. Please keep posting such tutorials 🙏🏼
Thank you
all doubts are clear now thank you mam
Excellent explanation mam keep posting
Thanks dear
If clear active only when it will get 1 therefore output of nand gate should be 1 but you have given 1 1 to nand input so output of nand will 0 so how clr will activate ??????
In this circuit clear is active low ( used with bubble) means it will be active when 0 will be applied to it
Mam yaha pe k map use nahi karna hai kya????
Not required
Please reply mam
Done
Matlab asynchronous counter me direct flip flop draw karna hai kya ??
Meri kal exam hai please help
@@KT-gr7em yes
Really mam
Thank you so much for your help 😊.