Master Slave JK Flip Flop | Digital Electronics

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The Master-Slave Flip-Flop is basically a combination of two JK flip-flops connected together in a series configuration. Out of these, one acts as the “master” and the other as a “slave”.
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[@farzanayasmeen9498]

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[@codewithab]

I will try in next semester for OS

[@ShahrukhKhan-jq8zm]

Ys sir i m eagerly waiting

[@faxui12]

bht badhiya

[@Enigma-fk7mh]

In case anyone wondering about the truth table for "Master - Slave JK Flip-Flop", it will be same as the usual "JK flip - flop" because the the output will be same - its just will act as the proper JK flip-flop because the Run around condition will not occur in this flip-flop.

[@satvikkapoor23859]

Thanks! I was searching in the comment section for this answer as i had this doubt.

[@BhavyaAgrawal1234]

Remastered Version Of JK Flip Flop

[@marziamehorin7252]

Your videos are great and your explainations are outstanding!!!!
it helps me a lot before my final examination.❤

[@AnUssHka]

Thank you sir..your videos are like saviors before exams. The concepts are crystal clear.

[@AbhishekKumar-dw7kx]

I have seen many videos in you tube but I couldn't understand till now but when I watched your video i understand all the things so thank you very much sir

[@stevin9893]

Wow! Flip Flop! Great! Thank you for sharing, Sir! Have a nice weekend!

[@reyazalam1391]

My all time favorite teacher to understand computer science subjects. Your explanations and clarity are just osm... Love u sir❤❤

[@rupeshkadam7600]

One of the best explanations of MS JK Flip-Flop on the internet.

[@532_halaharvisamhitha6]

Sir thank you so much!!! I see almost every Digital Systems video from this channel and the concepts become crystal clear❤

[@Unknown-ik3zk]

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You are superb sir

[@khanatiyanaaz7898]

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[@neeshusharma5889]

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thank you
💮💮

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Very good explaination with lot of passion you are teaching

[@AbhishekKumar-dw7kx]

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[@gunjanathwani4527]

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[@bahanbehera1182]

Really sir aap bahut achha se teaching karte ho.

[@theriyanshigarg]

Your explanation was amazing sir 👌...thanks a lot sir ❤

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Me in my mind 😂😂 level sabke niklenge..😂😂🗿

[@a.r.m.y1945]

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😂😂

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[@mehakdhiman045]

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[@Do-Your-Work]

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Thank you so much sir nd love you sir

[@arijitlaskar7587]

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[@nidhimavijyanti1880]

Nice as always 😀

[@S-Swami-M.]

Yes bro it's brilliant work!

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LEVEL SABKE NIKLENGE ❤😂😂😂

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Best explanation,, thankyou sir

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[@No_one_is_there487]

Brilliant explanation

[@aadildevihosur6392]

Sir aaaap digital electronics ke god ho ❤

[@sakshibhor8563]

Awesome👍😊

[@khushaboobhaskar4074]

Superb sir🙏

[@Dira_1111]

Thank you so much sir❤

[@muddurangabhakri2969]

i always study 1 day before exams and it always works when i watch ur video thankyou sir

[@Va2003g]

same here😅

[@Anonymous____________A721]

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[@Code99849]

Thanks sir...⭐

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Thank you sir 😊👍

[@mahima6144]

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[@faizzamir3965]

Thank you Bhaiya ❤ ❤

[@insanegaming2393]

Sir agar delay hi lana h buffer kyu nhi lagaya(2 not gate)

[@mrdakku19]

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[@palashmandal2829]

Thank You Sir

[@souravbhagat1358]

Pls Make a vedio of Questions on differnet varieties of counter and flip flops shift register. So we have to clear all the concept with Questions

[@srivaishnavimanne2713]

Tq sir☺

[@architsharma9973]

best teacher

[@RAJESHROSHANROUTARAY]

Amazing...

[@tanvisood2067]

I have a query. In the negative clock cycle when the slave flip flop becomes active, why will it toggle the Q, when the input to the slave flip flip is NOT (1,1) as opposed to master flip flop which does have the inputs (J=K=1) ?

[@bikrammajumdar5454]

thanks sir

[@vishali.vishali1003]

Thnk❤❤sir

[@nawoditregmi4977]

Thankyouu sir

[@ayodhyaprasad8708]

Thanks sir

[@SkyV77]

Congratulations to me 🎉 now I know everything about flip flops in 2 days

[@prantarbiswas]

what if we used the circuit like SR FF instead of adding the extra part?

[@Shorts_king_069]

Sir ak doubt tha ki agar ye toggle hota hee to kitni bar hota hee in one time duration

[@unpredictable588]

Just tell me which is not the most important topic 😅(btw great teaching)

[@achharchoudhary3682]

Great🇮🇳👑

[@daxeshsoni4842]

Sir please make video on master slave SR flip-flop

[@shikhatakhar4479]

Sir, are we considering the masters' output one time and the other time slaves' output? And one more question sir which problem have we resolved in master-slave flip flop is it reducing the time delay or not giving the feedback??

[@swarnavamukherjee7629]

Here you are increasing the time delay to overcome the Tw so that it doesnot keep on toggling the output continuously

[@Coding-with-me.]

Toggle means down(low) get graph

[@TehreembalocH]

koi bta sekta hai digital logic aur digital electronic defferent hainn kya

[@Coding-with-me.]

Trigger means up(high)get graph

[@bhavarparihar]

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what is the use of this in computer engineering?

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Thank you Sir!

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Love you indian tears

[@urvashibaghel3618]

Sir please explain the state table, diagram and equation also...🥹🥹🥹

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at 10:40 sir kya keh rhe hai. word samajh nahi aa rha

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Sir td zyada hota h aapne ulta boldiyaa..ek baar confirm krdijiye

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I have an exam tomorrow of Digital Logic Design on 22nd June 2024.

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Great as always 🔥🔥🔥 😎👊
1st Comment 💛💛💛

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Kya kiya fir?

[@Aanand.]

Bhai mera dost abhi Btech ke 2nd year mai aaya hai civil se diploma karke usko abhi bhoot hard ja raha computer science . q ki usko pehle koi bhi knowledge nahi thi computer science ki.

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[@shubhranshujha721]

ye wala nahi samajh aaya sirji😢

[@ashoksharma5436]

Tu fail h😂

[@manojsaini1696]

Sir isma NOT gate ka badla NAND gate use kar sakta ha ka

[@SkyV77]

Ha shyd laga sakte h , qki Vese bhi ek hi input ja rahi h

[@AmanpreetKaur-so5ls]

Sir definition v likh va deya Karo please

[@adyiebanerjee]

Lord❤

[@BANTIGAMING2002]

Sql plzz

[@atindimri5037]

Not (positive or negative) but (High and Low)

[@krishnasatpathy7443]

sikhne. aye ho sikh k jao jyada gyan mat melo

[@Coding-with-me.]

It gives delay

[@ToLiveToLearn]

Meno aapko pyaar kardena heeh

[@BANTIGAMING2002]

Bca 2nd chapter DBMS

[@BkAryan-gl5ul]

4:59
6:37
10:00

[@cryptonews2615]

Sir aap kvs nvs computer teacher ka full course complete kraye

[@a.k_rajput1755]

mmdu❤

[@mrtechindia]

In master slave flipflop the clk is edge triggered or leval triggered

[@manickam7231]

Level

[@mrtechindia]

@@manickam7231 flipflop means basically it is edge triggered

[@manickam7231]

@@mrtechindia yaaa but in case of level triggered to solve the race condition we would use master slave

[@jaysharma3776]

Level

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👑👑👑👑

[@BkAryan-gl5ul]

6:58

[@pranjalchand6792]

[@siddhishbanerjee6894]

snu mae job lelijie plz sir

[@AkashBenaka]

Padhle Bhai chup chap
Tumhe kya pata unka passion