Giants of digital electronics on RUclips: "All about electronics" "Neso academy" and you're another one which i found a bit lately but you explained flip flop better than anyone. Thank you so much.
I use to watch other youtubers video also but they just show and explain what is JK....but you teach why its JK...totally nailedit sir...awesome teaching skills ...love your videos
After completing my engineering and job till 2015 i was not in touch with my studies but today I am preparing for NVS and KVS so your video are the main reason behind my prepration ki haa mai kar lungi thanku for explaining every single topic in such a easy way 👍
Sir thank you so much .......in college my professor dont take any efforts for explaining concepts in details Just ppt and slides .....your videos are really helpful sir
01:10 JK flip-flop is an important topic in sequential circuits and is primarily based on the SR flip-flop. 02:20 JK flip-flop solved the problem of invalid output at 1 1 in SR flip-flop 03:30 The design of the JK flip-flop is similar to the SR flip-flop with two key changes. 04:40 When both J and K inputs are 1, the JK flip flop toggles. 05:50 The Qn value of the JK flip flop can either be 0 or 1. 07:00 JK Flip Flop gives an output of 0 when the inputs are 1, 0. 08:10 The output in the next state will be 1. 09:13 JK Flip Flop has a toggle feature where the output switches from 1 to 0 and from 0 to 1 based on the input values.
Good but why are you not considering feedback from Q Q bar when checking the output of latch....here we aresure that one input of the top Nand gate is zero for case 1..so in 1-0 case the latch should give out 1 instead of zero ofcourse if we dont consider previous t table for S-R latch.
tomorrow is my exam and now I 'm watching his video in 2x speed........just like an idol backbencher and bunker,.....feeling proud a little bit ...........................
everything is great , just one doubt, why is there a SR latch truth table using NOR gate whereas in JK flip flop here we'vs used SR flip flop using NAND gate....they both have different hold and invalid state
Take Nand gate, then build an SR nand based latch table and build "SR flip flop table". What he has shown on the screen was the SR flip flop table. Latch values & flip flop values are Reverse that's it.
Sir in this video uh said '0' '0' contains hold state and '1' '1' contains invalid state but in sr latch video uh said '0' '0' contains invalid state and '1' '1' contains hold state....which one is correct sir ???? It is confusing more....
That is the truth table of SR latch. But, this is a flip flop. When S=1 and R=1 in flipflop, after clock impulse is given, nand gate converts 1 and 1 to 0, so, in latch part of flipflop, inputs are 0 and 0 which makes output invalid.
College ki fees dete hai , padhna aapke yaha si hain, but degree dena aur provide krdijiye koi college me admission Hi nhi lega... Aur uske bad placement bhi....
Sir sr flip flop ko convert karke jk flip flop banaya gaya but aap jk ka baki like 01 10 00 bhi bata dijeye kyonke new circuit jk mein apply hota hai sr mein nahin so please describe those also
![Kodak Black - Versatile 4 [Official Video]](http://i.ytimg.com/vi/VcP_1Ua__vY/mqdefault.jpg)
Giants of digital electronics on RUclips: "All about electronics" "Neso academy" and you're another one which i found a bit lately but you explained flip flop better than anyone. Thank you so much.
This is boosting my confidence a lot for my first year engineering exams.
gate do ge keya
/?
this stuff is in first year?huh
@@superblitz2274 jhut bol raha...third yr ka hai ye😂😂
@@depression_plusplus6120 accha lol humara ye sab 2nd me hai to thoda confused tha mai lol
@@herambpatilofficial first year me ye sab kaha se aagaya bhai🤣
I use to watch other youtubers video also but they just show and explain what is JK....but you teach why its JK...totally nailedit sir...awesome teaching skills ...love your videos
After completing my engineering and job till 2015 i was not in touch with my studies but today I am preparing for NVS and KVS so your video are the main reason behind my prepration ki haa mai kar lungi thanku for explaining every single topic in such a easy way 👍
❤❤ right same happens with me. But my case is extreme as I sold out my all engineering books.
Nobody can teach as just like you , thankyou sir ☺️✨
ruclips.net/video/GDeHQNUIBDQ/видео.html
Lora hummer
Yes you're right.... Everyone is unique
Clg me fees dke degree lete lekin sikhte free me h yt se. Aplog nhi hote to humara kya hota
Itna bhi sch nu bolna rha Bhai 😂😂
Sahi bole bhai😢
Same😂
Us Bhai us😢
moye moye😂
The Best Explanation 👍🏻Thank you so much Sir 🙏🏻💐 U r the Best 😊
Great way of teaching you teach the topic very nicely this is what students wants in less time complete topic . Thank you sir ❤❤
sir ki teaching technique + sir ki avaj + sir == the reason of studying from gate smashers
Sir woh din door nhi h jab aapke subscribers millions m honge your teaching is to the point and very clear ✨
yeah, no doubt!! Sir your teaching method is Simple and graceful!
Thank you Sir.
he as 2million subscribers now, this video is viewed 1million times
Literally bhot vdia explain Kita hai... recommend vedio 👍🏻❤️....
Sir thank you so much .......in college my professor dont take any efforts for explaining concepts in details
Just ppt and slides .....your videos are really helpful sir
Very good teaching and clear explanation.
You made this concept much more easier 😊
Thank you sir very nice gide & very nice best explain jk filp-flop teaching video. 👍
1 gnte ka lecture sir apne 9 minute Mai pda dia thank you
Great as Always 😎👍
EK NO. VIDEO HE SIR........😇
@@codingwithrahul5600 Pacha kisine
in NAND
00=invalid
01=1
10-0
11=hold
why useing NOR latch table and showing NAND??
EXPLAIN?
best best teacher sir thank u sooo much
Thank you sir 🙏 aapka Sara padaya hua achhe se samajh me aata hai
Iitne aache se toh meri teacher bhi nahi padha pati bhaiya thanks aapka
Bhut hi bdiya padte ho ji
MAY God bless you sir 🥰🥰🥰
Very good 😊
Love you sir ji 💖
sir your way of teaching is outstanding.❣
Graphic era student ...like ✌🏻
😂
Logic ka exam h aaj to
@@mayanknegi9170 hn bhai🥲
@@mayanknegi9170 konsa sec?
@@Abhi_rana007 h2
The best teacher and best explanation sir
Aap jysai koyi nahi @gate smashers love u sir
Great lecture, just all of my fear has gone,
Love from Bangladesh 🇧🇩
You have same acemdemic syllabus?
@@abhitiwari5346Almost
01:10 JK flip-flop is an important topic in sequential circuits and is primarily based on the SR flip-flop.
02:20 JK flip-flop solved the problem of invalid output at 1 1 in SR flip-flop
03:30 The design of the JK flip-flop is similar to the SR flip-flop with two key changes.
04:40 When both J and K inputs are 1, the JK flip flop toggles.
05:50 The Qn value of the JK flip flop can either be 0 or 1.
07:00 JK Flip Flop gives an output of 0 when the inputs are 1, 0.
08:10 The output in the next state will be 1.
09:13 JK Flip Flop has a toggle feature where the output switches from 1 to 0 and from 0 to 1 based on the input values.
That Thankyou hits every time
Ap ka samjane ka tarika bhot unique ha.akdom sa samaj aa jata ha❤
very good action when sir was saying that .......lo gi aap ka jk flip flop taiyar😄😄
Interesting lagta je sir sune ko jab app samjhate hen 😊
Amazing Wow performance of this guy Head soft dear brother❤❤❤❤❤❤❤🎉🎉🎉🎉🎉🎉🎉🎉🎉🎉🎉😊😊😊😊😊😊😊❤❤❤❤❤❤🌹✨👍👍👍💯💯💯💯😊😊😊😊😊😊😊😊😊Super duper clap for this presentation ❤❤
Gate smashers bhai tussi great ho. Mujhe exam main pass kara dete ho 😊
Love from Pakistan ❤
Nice explanation ❤
Excellent teacher
Good but why are you not considering feedback from Q Q bar when checking the output of latch....here we aresure that one input of the top Nand gate is zero for case 1..so in 1-0 case the latch should give out 1 instead of zero ofcourse if we dont consider previous t table for S-R latch.
That's what I thought, if we are taking feedback before the latch then why are we ignoring it in the latch
U r welcome to gate smashers is fabulous ❤️
tomorrow is my exam and now I 'm watching his video in 2x speed........just like an idol backbencher and bunker,.....feeling proud a little bit ...........................
Wow super teaching
watching 20mins before exam 😂
😅😂😂
Paper m phone leke gya tha kya 😅
love you, ap ki wja se dld prhna start ki hai mai ne
Thank you .... Your video is really very helpful... Concept are so easy to understand...
everything is great , just one doubt, why is there a SR latch truth table using NOR gate whereas in JK flip flop here we'vs used SR flip flop using NAND gate....they both have different hold and invalid state
Take Nand gate, then build an SR nand based latch table and build "SR flip flop table". What he has shown on the screen was the SR flip flop table. Latch values & flip flop values are Reverse that's it.
Solute to u sir👌🏻
Very very useful🎉
God bless u😇
mai to fan ho gai ap k teaching style ki.....
Sir you are brilliant
Very very thanks sir playlist best all lecture 👍💯💯💯🙏🙏🙏
Bhaiya ji ek din pehle bacha liya exam ke...aapko jannat nasib hogi...love from pune ❤
72 hoorain milengi 🥸
Sir literally aapki videos na hoti to pata hi nhi m itna bada syllbs kese hi kr pata😢😊😊
Thank you for such a wonderful explanation😊🙂
Thank you very much Sir for educating us through this video. 😊
Ossm Teacher u r Sir❣️🤲
Such a amazing great easy method
How is the Josh sir 🎉
Amazing teaching style 🤩🤩🤩👏👏👏👏👏👏😄👏😄
Sir in this video uh said '0' '0' contains hold state and '1' '1' contains invalid state but in sr latch video uh said '0' '0' contains invalid state and '1' '1' contains hold state....which one is correct sir ???? It is confusing more....
That is the truth table of SR latch. But, this is a flip flop.
When S=1 and R=1 in flipflop, after clock impulse is given, nand gate converts 1 and 1 to 0, so, in latch part of flipflop, inputs are 0 and 0 which makes output invalid.
Same case for S=0 and R=0
Thank you❤ sir jk flipflop meri samajh me ageya 🙏🙏
Outstanding Explanation 🎉❤
Def helped a lot rn in my first sem in engineering
So basically,,, I was searching jk ff but this video pops always between them so came to check it now I am going biiiiyyy😂❤
Thanks sir itna achchha samjhane ke liye
Take love from Bangladesh
Sir its nand base latch ka truth table se explain karna padega...jo ki apne ulta likha hain
GOAT teacher❤
Nice teaching.
💞Love•U•Smasher•Sir💞
Most•Helpful•Video
Great sir Thanks help huwa bahut
Great lecture Thanku sir g
needed my friend to translate, but helpful video
Awesome explanation
Thank you sir
Amazing video🙌🙌
Bhut achha samjh me a gya sir
Very helpful videos sir....I hope you'll achieve a great success in future ❤🥰keep it up
Zabardast
Very Good Sir 😊
You are soooooooooooo nice ❤
From Pakistan
Thank you so much sir❤
Watching from Nepal 🇳🇵
BCA 1st Sem Student
Love from assam sir✌️
I am in class 12 and that is very helpful for me❤
Thank you sir❤
Thank you sir❤❤❤
Nice explanation 😊
brilliant teacher
College ki fees dete hai , padhna aapke yaha si hain, but degree dena aur provide krdijiye koi college me admission Hi nhi lega...
Aur uske bad placement bhi....
best explanation sir, thankyou sir
sir mai toh college mai padhta hi nhi hu kyuki mujhe pata hai ki aap yaha padhate ho 😂😂😂😉😉😉!
Tera toh yaha pe v padhai nhi hota ..cgpa kitna h
@@shlokmantri799 Panchayat kya hota h
GREAT JOB SIR 👍👍
Thanku so much sir for this video .
I want more on this topic sir plz upload more vdo vry soon
Thank you bhaiya 💓❤️🙂🤗
Aap ki wja se mai ne dld ka course rkha, dld mai tou interest hua nahi aap mai zaroor hogya hai
Sir it is confusing, ehy you directly told that it will be SR latch on 0, 1 case but you did not consider the ongoing outputs, it must be invalid case
Thank you so much.
Latch me 0। 1 ke case me 0 aata hai sir😮😮
Sir you Save my final exam 🤦🏻♂️
Love from Pakistan 🇵🇰🥺💝
Pakistan me teacher nahi hai kya 😂😂
Sir sr flip flop ko convert karke jk flip flop banaya gaya but aap jk ka baki like 01 10 00 bhi bata dijeye kyonke new circuit jk mein apply hota hai sr mein nahin so please describe those also
How to get Qn+1 output with other J&K inputs
for other inputs it will be same as SR FF
Sir can u guide me i m using ur videos for gate exam can u tell me which book i can follow to get good grasp for gate exam.
Par Nand gate latch ma to 0, 0 invalid hota hai or 1,1 hold hota hai
Sir aap SR latch ka truth table bnaya hai usmein 0 1=0 hai pr aap 1 btaa rhe ho i am confused🤯
sab thanks hi bol rhe, ye doubt ka ka bhi koi reply de do
Watch video again ... U can check there in sr latch using NAND gate ... When S = 0 , R = 1 ... Qn+1 = 1 (set condition)
1 hi hai yeh mistakes se likh diya sir ne