You know your doing you job right when I was able to go back to the Excitation table I learned in 155 and derive the truth table for the Tff just from knowing you tied the inputs together. I feel like I've reached the next level of understanding of flip flops.
Thank you sir for this wonderful lectures..... because of ur class I understood all the topics regarding flip flops from stem to stern...move ahead with ur potential to make the lectures this much crystal clear
You have a negative edge triggered T-FF diagram, but a logic table that reflects a positive edge triggered behavior. This caused a little confusion, but I get the point, except for that little bubble there, because it caused a little confusion :)
thanku u so much sir... your tutorials are very interactive as well as understandable.. keep doing this.. best part of ur video is you start from scratch level..
You have a negative edge triggered flip flop, and that means it when T is 1, the Q toggles when clock goes from 1 to 0. If the clock is 1 or 0, nothing happens.
Thanks again for this video. But why did you put a bubble in the ff clock entry as if it is neg edge triggered? and other question is flopflops are edge triggered, so why you say 0 or 1 for the clock signal. I think ff supposed to produce value while clock signal is in the ''rising edge''
If this T flip flop is negative edge triggered (as indicated by the circle and triangle in the clock input), is the JK flip flop shown a Master-Slave JK flip flop? I couldn't draw a time diagram and see the value of Q changing when T=1 ONLY when the clock goes from 1 to 0.
If the T flip flop is negatively edge triggered(as indicated), then shouldn't it work only when the clock is undergoing NT unlike the truth table mentioned in the presentation.
I am a bit confused here. When we were doing JK flipflop, we used the master slave operation to achieve toggle. Over here, we didn't use any such operation. Yet we are calling it toggle. Any good soul out there, please help me understand this stuff.
Sir, Is it necessary to memorize the characteristic table, i mean if i have the basic Idea of how things work for a certain FLIP-FLOP then it would Hardly take me a minute to draw the Characteristic table.??
We get toggle condition in MS ff..Master slave is similar to negative edge triggered JK flip flop that's why he used that diagram..But shouldn't clock be low to make ff operational and not high 👀?? Can someone clarify please the truth table part?
Consider a JK flip flop and assume clock =1 and If J=1,K=0, then output Qn = 1. If J=1,K=1, then output (Qn) ' = 0. as we know that previous output Qn =1. In T flip flop when clck = 1 and If T=1, then output is (Qn)' =? 1. What is the value of (Qn) ' as the T flip-flop doesn't have SET and RESET conditions..? 2. As there are no SET and RESET conditions, the T flip flop hasn't stored any bit and how can we say that for J=K=0, the previous output hasn't changed ...?
hello sir ,firstly thank you and im having difficulties in learning the waveform analysis ,i want the basic and deep knowledge about it,so if you can help in this case it would be great.
You are using negative edge triggered FF but while making the truth table you have used clk = 1 as the active condition for FF. Anybody facing this problem please tell me.
in this lecture sir has used negative edge triggered jk ff which gives same output as the master slave condition so racing will not happen in this case.
+Anuj Sinha Notice the CLK connection symbol of a triangle and a circle. This indicates that the FF is negative-edge triggered. See previous lectures if that doesn't answer your question.
Hello, I know this video is 4 years old, but I have looked everywhere and I can't find anything related to latch T, could you make a video of Latch T waveform?
+Lakshmi Tejas M.A actually the video is made in the view of all viewers...with that speed many people get it but with more speed some people will be left in confusion...still that's okay
Even our teachers are recommending this channel😅😅
Minecraft is recommend this channel too. For redstone engineering.
Yes
@@KandiKlover wdym
@@holiday157 he playes lot of games.
@@holiday157 English nhi aata be…
You know your doing you job right when I was able to go back to the Excitation table I learned in 155 and derive the truth table for the Tff just from knowing you tied the inputs together. I feel like I've reached the next level of understanding of flip flops.
Sir !! you are very good teacher, a gentleman and a scholar! Thank You very much for your efforts !! Greetings from Norway.
In many lectures, there is only intro of 3 minutes but here a topic is completed in 3 minutes😂 hats off to you sir👏👍
Really great work.Your efforts are priceless and also you are saving time.
GOD BLESS YOU
R u a student
The first 50 seconds literary saved my day !! Thank u !!!!
This is better than any boring college lectures.. 🙃🤣🤣
Just about to go to my exam... wanted to thank you. Your videos are the only thing i looked at to prepare myself for the exam. Thanks 👍
Thank you sir for this wonderful lectures..... because of ur class I understood all the topics regarding flip flops from stem to stern...move ahead with ur potential to make the lectures this much crystal clear
Flip flop galat padhaye…wapas padho
You have a negative edge triggered T-FF diagram, but a logic table that reflects a positive edge triggered behavior. This caused a little confusion, but I get the point, except for that little bubble there, because it caused a little confusion :)
So, the bubble is wrong, isn't it ?
thanku u so much sir... your tutorials are very interactive as well as understandable.. keep doing this.. best part of ur video is you start from scratch level..
seema anjum hi
Sir..You are Superb!!
I am become fan of your videos from when listened your first video..you are really too good sir..Hats off to you.
Thank you sir
Sir your lecture is helping us very much and regarding your question about your speed and other stuff everything is good.
*1 hour before Exams*
How was the Exam?
PIU!
@@ostwalaman A grade!
A night before exam
In quarantine this could be during the exam lmao
Why is there a bubbled clock in the diagram? Is it representation for negative edge triggered?
Yeah
You have a negative edge triggered flip flop, and that means it when T is 1, the Q toggles when clock goes from 1 to 0. If the clock is 1 or 0, nothing happens.
Thanks again for this video. But why did you put a bubble in the ff clock entry as if it is neg edge triggered? and other question is flopflops are edge triggered, so why you say 0 or 1 for the clock signal. I think ff supposed to produce value while clock signal is in the ''rising edge''
Same question. 🤔 Why talk abt levels (0 and 1) in FFs rather than rising n falling edge ??!! 😕
thank you for making videos man! is there any way i can donate money for your channel to keep up the good work?
+Neso Academy wow man ur channels are awesome with good explanations! infact u should keep up the good work they are going to help my exams :P
You can donate in their patreon.
Given in description
Thank u so much NESO ACADEMY,tommorow is my xam & now i am sure i will pass,ur videos made learning too much damn easy,keep uo your work
Thanks a lot for making all these videos.. you are doing a great job :D
very helpful :)
Thanks alot sir. Very helpfull. God bless you.
Thank You very much for your efforts !!
If this T flip flop is negative edge triggered (as indicated by the circle and triangle in the clock input), is the JK flip flop shown a Master-Slave JK flip flop? I couldn't draw a time diagram and see the value of Q changing when T=1 ONLY when the clock goes from 1 to 0.
Its normal edge triggered JK flip flop.
neso academy. ...excellent! !! . could you make clear difference between JK & T FF whether it is toggles or racing around? 😴
I am a diploma student and I watched all yr videos ..now i think i hv done btech ..😍😍
Its Superb..!!!
Helped alot for my engg studies.
Thank you..
Placement nhi lage ga isse
These videos are very helpful thanks a lot.
Your channel is just perfect bro. I've subscribed and liked the video. This is all I can do for now. Thanks.
If the T flip flop is negatively edge triggered(as indicated), then shouldn't it work only when the clock is undergoing NT unlike the truth table mentioned in the presentation.
It will only cause a delay nothing more.
Yes
You are a Godsend
hmmmmm.....awesome im now folllowing yuh lectures sir!!!!!
THANK YOU
Thank you 👏👏
your amazing. . thanks
It's too good video and easy to understand!
so thank you sir for
this help::
and upload other topic video also.
These videos r very useful
My teacher said he also learn from this channel 😅
thanks.....helped me a lot
thanks neso once again the best vedio
thankyou sir
thanks, made a 3x3 piston door
3x3 is kinda hard man, I suggest making 4x4 fault
Love you
I love you
Thank
Sir their is negative clock which make ff operational at 0 and disable at 1
very helpfull gr8 job
Thank u so much😇😇😇
Sir, why have u take clock as bubbled input in this case, and not in SR flip flop ?
I am a bit confused here. When we were doing JK flipflop, we used the master slave operation to achieve toggle. Over here, we didn't use any such operation. Yet we are calling it toggle. Any good soul out there, please help me understand this stuff.
Yup same doubt over here. Of course we must use master slave ff here right?
But why they are using JK ff
It gives racing output right?
Thanks sir
I had a doubt about the T flip flop, the racing around condition will not happen in the T flip flop when T=1??
very nice for GATE etc.
Nikla gate?
Why did you put the circle in the clock signal?Is it negative edge triggered?Thanks.
+Rishabh Gupta yes
thanks.
Sir, Is it necessary to memorize the characteristic table, i mean if i have the basic Idea of how things work for a certain FLIP-FLOP then it would Hardly take me a minute to draw the Characteristic table.??
We get toggle condition in MS ff..Master slave is similar to negative edge triggered JK flip flop that's why he used that diagram..But shouldn't clock be low to make ff operational and not high 👀?? Can someone clarify please the truth table part?
15 min for exam
why negative edge triggered clock is used in this case??
U r the bestest
What was that sound at 2:08 XD?
And also the toggle is not controlled so its actually racing so what use ... its just same as before did it deserve a separate vdo
Consider a JK flip flop and assume clock =1 and
If J=1,K=0, then output Qn = 1.
If J=1,K=1, then output (Qn) ' = 0. as we know that previous output Qn =1.
In T flip flop when clck = 1 and
If T=1, then output is (Qn)' =?
1. What is the value of (Qn) ' as the T flip-flop doesn't have SET and RESET conditions..?
2. As there are no SET and RESET conditions, the T flip flop hasn't stored any bit and how can we say that for J=K=0, the previous output hasn't changed ...?
so it will run if its a normal jk and toggle if its a MS?
Had never understood MSJK FF this clearly!! 🙏🙏🙏
Anyone knows?
SRFF = Set Reset FF
DFF = Data FF
TFF = Toggling FF
JKFF = ?
Please tell me how the flip flops acts as toggle mode
When a flip flops are given how those flip flops acts as toggle mode
hello sir ,firstly thank you and im having difficulties in learning the waveform analysis ,i want the basic and deep knowledge about it,so if you can help in this case it would be great.
Saved My exams
SIR PLEASE TELL HOW CAN THE FLIP FLOP BE JK , IT CANNOT BE JK BECAUSE THEN IT WOULD TOGGLE CONTINUOUSLY. SO IT SHOULD BE MASTER SLAVE JK RIGHT?
clk is bubbled. so flip-flop will work for clk = 0 ? Pls clear this doubt.
What is the need for master slave application for d flip-flop
still confusing. For the Truth Table, what was the reason to have Qn+1 as output, instead of Q and Q' ?
Qn + 1 is Qn of course and Qn' is just it's compliment no need to mention that's why..
Qn =0 Qn' =1 and vice versa
Hi.
Please could you send the explanation of latch using 2*1 mux...
Like that d flip flop using mux.
This type of videos send please...
Aur kaam nhi hai kya uske paas
why clock is taken as bubbled???
ankit tiwari Bro if the clock is bubbled it means its negative edge triggered flip flop
because for -ve (level triggering or edge trig.)
but why
That bubble means it is negative and that little arrow means it is edge triggered
It is -ve edge triggered
please upload problems of Flip Flops and Encoder Decoder
why there is a bubbled clk to T-flip flop?please explain this concept.
Its that way so it's negative edge triggered. So the descending edge of the clock waveform will trigger it.
Was looking at minecraft stuff but wondered hey why not
sir your speed is little bit fast.......othere all things Are superb
then see it in slow motion :p
xD
haha
What type of Jk flip flop used in t flip flop; normal jk ff or master slave jk ff??
mersiiiiiiiiiiiiiiiiiiiiii
sir please clear my doubt that when we say its JK flip flop does it mean master slave flip flop or simple JK flip flop?
You are using negative edge triggered FF but while making the truth table you have used clk = 1 as the active condition for FF. Anybody facing this problem please tell me.
Nhi
bhai ki ijjat bachali banchoooo
If T=1 it means J=1n k=1 then how come it is toggle n not racing. Can u explain in detail??
I accidently got here by looking for minecraft Redstone tutorials
This is way more complex than the T Flip-Flop in minecraft
They are actually the same thing
@@lostrazzz i know but the logic irl is kone of complex
I just came here for Minecraft redstone
when j =k=1 ..it is race around condition in j k.. so does same thing happen this t flip flop... if not then y?
in this lecture sir has used negative edge triggered jk ff which gives same output as the master slave condition
so racing will not happen in this case.
when j=1 and k=1 then there is race around condition in jk flip flop then why it is reffered as toggling action in this lecture?
+Anuj Sinha
Notice the CLK connection symbol of a triangle and a circle. This indicates that the FF is negative-edge triggered. See previous lectures if that doesn't answer your question.
in edge triggering race around condition doesn't exist
is it possible to make this out of logic gates?
to aur kisse bana be..
Hello, I know this video is 4 years old, but I have looked everywhere and I can't find anything related to latch T, could you make a video of Latch T waveform?
latch t waveform?
@@kerhasooy8227 I found the answer already, thanks anyways!
@@justarandomlol Can you explain?
@@kerhasooy8227 it's just the outputs, when you take the output (0 or 1) and draw the waves.
@@justarandomlol Oh ok, thank you for answering :D
i thought this was a redstone-only term
10 minutes before exam 🙏
sir plz provide the slides of the presentation
Notes banao jakr
Sir shouldn't We use ms flip flop to get toggle output instead of jk flip flop?
sir isme Q=Qn and Q complement= Q(n+1) hai..........
Minecraft wala chahiye
everything is good but need little speed. no problem i ll watch at 1.5x
+Lakshmi Tejas M.A actually the video is made in the view of all viewers...with that speed many people get it but with more speed some people will be left in confusion...still that's okay
Cachaa❤️