THANK YOU! My professor has never broke this down for us in such a comprehensive way. Thank you for taking your time to explain each step and why they are relevant.
Thank you, this has helped me a lot! One thing though is the quiz questions seem very vaguely and confusingly worded: "What is the ideal speedup due to pipelining?" well, from what is said here, pipelining WILL speed up executed instructions. And this is the ideal point of it. It will do this because of how the stages are organized and utilized. So it's both. Unless the question was meant to be "what is the ideal speed up due to, in pipelining?"
Thank you so much Dr. Ben for explaining this tough concept. I was confused by my instructor in this concept , but now I understood the concept very well.
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THANK YOU! My professor has never broke this down for us in such a comprehensive way. Thank you for taking your time to explain each step and why they are relevant.
Thank you, this has helped me a lot! One thing though is the quiz questions seem very vaguely and confusingly worded: "What is the ideal speedup due to pipelining?" well, from what is said here, pipelining WILL speed up executed instructions. And this is the ideal point of it. It will do this because of how the stages are organized and utilized. So it's both. Unless the question was meant to be "what is the ideal speed up due to, in pipelining?"
Thank you so much Dr. Ben for explaining this tough concept. I was confused by my instructor in this concept , but now I understood the concept very well.
Thank you. Very clearly explained.
Hi professor, I think there are some nosies in this video and I will some improvement in the future. Thanks for your deligent work
Each part of the cpu core works in parallel. Though sometimes memory acceses can take multiple clocks...
Excellent class!
GOOD VIDEO!!!! 🐐🐐🐐🐐🐐
Made it in a understandable way !! Thanks Sir
Very nice and clear explanation! Thank you!
very nice course, appreciate for sharing
13:05 It should be the line on the bottom of the yellow one, the yellow one is to send the next instruction address.
Vielen Dank!
8:54 64bit/32bit depend on the MIPS type
noice
Second