Icestudio - Open source GUI for FPGA design and programming, visual drag-and-drop, no code required!

Поделиться
HTML-код
  • Опубликовано: 24 июн 2020
  • Here I demonstrate the icestudio tools: an open source GUI-based FPGA design and synthesys tool. Drag-and-drop to create your design visually in a GUI! No need to write any code. Icestudio is fun to work with and easy to get going on your own Go Board. No code is required to work with this tool!
    Support me on Patreon: / nandland
    Try icestudio: icestudio.io
    Buy a Go Board: www.nandland.com/goboard/intr...
  • НаукаНаука

Комментарии • 25

  • @vejymonsta3006
    @vejymonsta3006 4 года назад +7

    Whoa. I've been waiting for a tool like this. Looks like my prayers have been answered!

  • @sumitkavathekar
    @sumitkavathekar 4 года назад +3

    Thanks for this ! Really amazing !

  • @oviya.n1317
    @oviya.n1317 Год назад

    MASSIVE DUDE. I work as rtl design engineer and few days back i designed a 16x2 matrix lcd in verilog. But it was difficult for me to do simulation alone as i am not provided with any hardware to dump and see. But i wanted to have greater visualization apart from looking at only graphs . THIS MADE MY DAY. Can u post videos ON AMBA APB CDC SYNTHESIS TIMING CONSTRAINTS etc., THANKS IN ADVANCE

  • @xmotoFF
    @xmotoFF 4 года назад +2

    Cool! Even though I hate GUI programs for programming FPGAs, they are a good tool for beginners. And it's open source, so it's double cool.

  • @wemme
    @wemme 4 года назад

    Awesome video. I have ordered my go board. What do you have planned for 2020?

  • @squirlmy
    @squirlmy 3 года назад +2

    I think you should have acknowledged the "new nightly version" pop-up instead of ignoring it. There's enough people who won't understand such an feature of open source projects... well I think new users of FPGA programming might also be new to FOSS, and the damn pop-up is so freaking big on the screen (nightly builds aren't even exclusive to Free and Open Source, but lets just acknowledge it's there, and that such notices can easily be turned off) Otherwise its a great presentation. On another note, I just started looking at a book that pleads the case that FPGA programming isn't well integrated into "dev-ops practices", which reminds me of the status "html programming" in the mid-nineties. There wasn't enough JavaScript or other technologies to make "web programming" seem like "real programming". It was sometimes treated as a scripting toy by mainstream professionals, but simultaneously a big push to put " web programmer" as a resume qualification. FPGA seems to be there at the moment, like just "scripting for hardware electronics", and not part of larger everyday workflow in corporate dev-ops. Expect that to change.

  • @bennguyen1313
    @bennguyen1313 2 года назад

    It's looks like Lattice has embraced (or at least not opposed) the open-source synthesis / place-and-route tools that generate Lattice bitstreams! Any thoughts on how these open-source tools (ex. IceStudio / SymbiFlow / YosysHQ ) compare to the commercial offerings?
    For example, can the older (2004) Lattice Products listed on the website (ex. Design Software > 1553 Encoder/Decoder ) be freely-downloaded, and synthesized with either tool? I'm interested in starting with a working IP, going thru the design flow software, to finally testing on hardware!

  • @coding_vlsi_vietnam
    @coding_vlsi_vietnam 3 года назад

    Look for a same tool evey long time. Thanks a lots . But how can i download it ?

  • @engjds
    @engjds Год назад

    I am currently playing with gowin GW1NZ tang nano fpga, as its just $10 for a small development board, which is great for small projects, and the gowin IDE though basic, gives a reasonable working environment. what other low cost boards would you recommend, played with the Altera Nano De0, De1 but never tried Lattice.

  • @tombouie
    @tombouie 2 года назад

    Thks

  • @anudeepreddy3745
    @anudeepreddy3745 4 года назад +2

    Could you please also make a video on how OpenCL is used for using FPGAs as hardware accelerators?

  • @hightlightlol2106
    @hightlightlol2106 4 года назад +3

    Could you make a video about using opencores on opencores.org. There are alot of opencores for FPGA but I dont know how to use them on my project. Currently im working with Intel quartus and most of IP core from this software require subcription

    • @satpatel7508
      @satpatel7508 3 года назад

      Yes, that sort of training is hard to find on the internet.

  • @juanpauloazaelpalacios-vil5422

    Does this support HDLs too in case we just want to upload a simple VHDL blink program?

  • @xxgabgab789xx2
    @xxgabgab789xx2 4 года назад

    GO BAORD INQUIRY Hey nandland! I'd like to purchase a Go Board and do your tutorials but I have a Mac , is this feasible?

  • @Alpine_flo92002
    @Alpine_flo92002 3 года назад +2

    Are there any sub 20$ boards that support this program?

  • @johnlombardo6543
    @johnlombardo6543 2 года назад

    Menuing has changed. On version 0.9.0, There's no "Basic" and can't find the LED .

  • @MrHeatification
    @MrHeatification 3 года назад

    any idea how to upload to BRAM and not to Flash?

  • @legomindstormsfan1
    @legomindstormsfan1 2 года назад

    is there any way to download your .ice example files?

  • @GORF_EMPIRE
    @GORF_EMPIRE 4 года назад

    Ok so I installed this under Ubuntu 18 and when I select the go board it says I/O not defined, even tho when I click on the PCF it shows all the I/O's are indeed defined. Any ideas?

    • @Nandland
      @Nandland  4 года назад

      Is this when building the project? I had an issue where I had to change the I/O from the default on the drop-down to something else, then change it back again. That was a weird one.

    • @GORF_EMPIRE
      @GORF_EMPIRE 4 года назад

      @@Nandland I figured it out...I think.... I used an example and it asks to load or convert.... I asked it to convert.... apparently it does not work. so I just went from scratch .... my other issue is how do I break out signals from a reg bus. In your 7 segment code, the reg value in your first code block puts a value[3:0] bus on the block. I want to send those bits to the led's on the go board.... how do I separate them to each of the 4 LED's?

  • @davidjohnston4240
    @davidjohnston4240 2 года назад +1

    Designing FPGA logic with schematics is a nightmare. Go straight to your preferred HDL.