Session2.1: Design of CS amplifier using Gm/ID methodology

If you wish to support me: www.buymeacoffee.com/narashim...
The session 2 is broken into 3 video series:
In the 1st video (which is the current video), we will look at the design steps involved in the design of CS amplifier and also address the differences between the theorical results and simulation results.
The 2nd video will show the design procedure that can be used followed iusing Cadence Virtuoso tool
The 3rd video will show the same design procedure using an open source tool, LTSPICE.
Links to the model files and it's Database in .mat file:
nmos1.scs: drive.google.com/file/d/0Byyc...,
pmos1.scs: drive.google.com/file/d/0Byyc...,
180nch.mat: drive.google.com/file/d/10uDn...,
180pch.mat: drive.google.com/file/d/1VBh5...

[@creativeworldwithhibbafarm1210]

such videos are much needed for the Analog IC Designers, please continue share your design experience with us, thanks.

[@anirbanerjee100]

Excellent video..

[@fidelcertuche8002]

Nice explanation, thank you!!!

[@shubhamkhanna7910]

Nice Explanations

[@mrinalkantidebnath1301]

Pls continue upload new video they are really helpful .

[@user-ls5zc5iz7u]

Thanks for the good explanation.I have one question, I wonder why the Cgs/Cgg increases at the same gm/ID as the length increases.

[@marmosetman]

Is it possible to get a copy of your slides? Thanks!

[@mohdkashif4596]

Sir, Excellent content on analog 👍please make a video on CS amplifier design with PMOS load and two-stage opamp design.

[@analog-ic-design]

Sure, but currently I'm stuck with my PhD work. But the contents are ready for both of your requirement. May be I will try by this december.

[@mohdkashif4596]

@@analog-ic-design thanks Sir. It's great to hear that you have the content ready for both requirements.

[@cMkyubbi]

It would be nice to give credits to the source of this material. Prof. Boris Murmann's text.

[@narashimaraja]

Yes, thank you. I will do that.