7 segment display on Basys 3(VHDL)

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  • Опубликовано: 16 дек 2024

Комментарии • 35

  • @eda1058
    @eda1058 8 месяцев назад

    ıt gave an place_design error for constarint file while implemenatation but it it just the same as yours.How can I fix this?

  • @mubasheer5584
    @mubasheer5584 3 года назад

    Dear. How to display an ADCs output in decimal as representing voltage level on seven segment display in VHDL

  • @hamidfsian7088
    @hamidfsian7088 3 года назад +3

    thank you ,
    would you mind if you explain how to implent a testbench ?

  • @rikpeeters
    @rikpeeters 3 года назад

    what the hell is up with all the '8', kept reading them as 0, particularly on line 54 and 65

  • @hdarius1005
    @hdarius1005 7 месяцев назад

    Hi, how can I make it to count in decimal not in hexa?

    • @ibelectronicsworld
      @ibelectronicsworld  7 месяцев назад

      Hello, yes you can do that but will need to change the code.

  • @hanlh3202
    @hanlh3202 3 года назад

    Is it possible to ask for code?

  • @filipemachado7042
    @filipemachado7042 3 года назад

    I have emailed you asking for the code; Can i get it? Thanks

  • @bricesirvin43
    @bricesirvin43 4 года назад +2

    Excellent video and very interesting ;)

  • @saiteja7400
    @saiteja7400 3 года назад

    Please send the testbench code for it

  • @javiergamo9788
    @javiergamo9788 4 года назад +3

    Great example! Would you mind to share your code (VHDL and Constrain files fro Bays 3? Thanks in advance

    • @RubyZagan
      @RubyZagan 4 года назад +1

      @@ibelectronicsworld may you also email me the code?

    • @nguyeninhai9782
      @nguyeninhai9782 2 года назад

      @@ibelectronicsworld can you also san me the code?

    • @tudormarian4916
      @tudormarian4916 Год назад

      @@RubyZagan do you still have the code?

    • @tudormarian4916
      @tudormarian4916 Год назад

      do you still have the code?

    • @javiergamo9788
      @javiergamo9788 Год назад

      @@tudormarian4916 I asked for it, but never got it.... 😔

  • @Egg-kh2xo
    @Egg-kh2xo 9 часов назад

    You go from a logic diagram with very large featured at full screen to VHDL text with micro small features an you display that with a fifth of a screen making it unreadable, where is the logic in that

  • @valenting6282
    @valenting6282 2 года назад

    Hello i want to create a stopwatc, your video helped me a lot but how i can stop to count at 9 and not at F ?
    All answers are welcome !
    Thanks ! :D

    • @flobbs
      @flobbs 2 года назад

      Have you already found a solution for this Problem?

    • @valenting6282
      @valenting6282 2 года назад

      @@flobbs yes thanks ! ^^

  • @alvarolopez4885
    @alvarolopez4885 4 года назад

    Excellent video!

  • @MrAminsaeed
    @MrAminsaeed 4 года назад

    Would you mind to share your code

  • @sandramercado360
    @sandramercado360 3 года назад

    Excellent video :)

    • @sandramercado360
      @sandramercado360 3 года назад

      would you mind to share your code, please :)?. i sent you an email.

  • @Moradtumah
    @Moradtumah 2 года назад

    nice

  • @flowerbeads801
    @flowerbeads801 3 года назад

    i have emailed you, can you send me the code as well?

  • @rairamirezgaytan3112
    @rairamirezgaytan3112 3 года назад

    Great video could u please sen me the code?

  • @yoohbrooxd9563
    @yoohbrooxd9563 3 года назад

    Great video could u please sen me the code?
    =)

  • @huseyintosun4437
    @huseyintosun4437 3 года назад

    I've sent you an email. Could you please send me the VHDL code as well?

    • @mehmetkaanyildiz18
      @mehmetkaanyildiz18 3 года назад

      Kanka hangi okuldasın bilkentte mi turnitin çıkmasın

    • @huseyintosun4437
      @huseyintosun4437 3 года назад

      @@mehmetkaanyildiz18 Hayır, Bilkent de değilim, AGÜ deyim. Kendim öğrenmek için istedim kodu. Digital Design dersimiz var, lablarda buna benzer şeyler istiyorlar her hafta. Bu hafta full adder ve 4 bit binary adder yaptık mesela. Bu arada sen Bilkent de misin? Bizim okulun kalitesi ve ismi Bilkent ile kapışamaz tabi ki ama baya zorluyorlar bizi lablarda ve projelerde. Mesela bunun gibi bir VHDL kodu 2 saatlik lab da bitirmemiz gerekiyor.

    • @celalyahyaergun7614
      @celalyahyaergun7614 3 года назад

      @@huseyintosun4437 kanka kodu aldınmı ya atabilirimisin mail versem

    • @tudormarian4916
      @tudormarian4916 Год назад

      do you still have the code?