In the past I made a mouse bite footprint w/holes and 2 “cross-hairs” on a scratch layer (or add snap points) for the route tool path end points to snap to. You have to assign a mech layer to be the route tool path layer (vs using a board cutout). Place multiple copies of that footprint around the embedded array and run route tool path tracks between the cross hairs. I’ve also included such features in the source pcbdoc so they are automatically arrayed… but you will have to waive various DRC errors or make a rule to allow these holes outside the board outline. I’ve also used a skinny route tool path as a V-Score line, but mostly this is to get some sort of realistic looking line in a realistic 3D view in Draftsman
I like making that kind of stuff into footprints (I have them for mounting holes and fiducials) but I never thought about it for a mouse bite, that's a good idea.
If the edge does matter for end use / packaging, then it makes sense to have the holes on the board side so you don't end up with burs after depaneling, you just have to have an increased keep-away zone. The number of holes and spacing is also a function of how much rigidity the board has. Sometimes the force to de-panel a v-score is higher or limited due to overlapping connectors past the edge. If the boards are not well supported, it can result in assembly failures. Unless you are doing the assembly yourself, it's almost better to leave the panelization to the board house you are sending it to. Also if you are not using a depanelizer, breaking these boards / v-scores can induce a lot of stress of the FR4 layers and can be enough to crack near by vias from the board delam. Keep traces and vias away from these mechanical stress areas.
These are all good points, especially the fab house part of it, some fabs provide templates for customer-defined panels and the customer still gets it wrong! I like the holes internal to the board idea but you can always file off the excess material of they are on the breakaway tab, I guess most designers probably don't keep those filing tools around though. I've only made panels a few times but each time I get the manufacturer I'll use to review the panel to get their opinion on the hole count/spacing.
Great video from Zach, as always. I definitely prefer to design in mouse bites at the PCB (rather than panel) level as it means I retain control over some very important criteria: * Placing the hole centres 0.25 mm inboard from the PCB edge means any burrs generally don't need to be filed off - any such manual process is expensive! Adjust component placement and inner plane pullback to suit. * Depanelization will put some big stresses in the local mouse bite area and delicate components such as chip Rs and MLCCs can easily be damaged in the process. Putting a keepout zone (2~3 mm) around the mouse bite makes for better yields and reliability. * Adding a solder mask void area over the mouse bites prevents the coating splintering during depanelization. * Internal planes can have a bit of pullback in the mouse bite area. The broken bits of PCB allow greater ingress of moisture etc., so a bit of extra margin is useful for reliability, and essential for high-voltage boards. * The shape of any internal corners in the PCB profile is determined by the radius of the router bit, so best to define the router path and width from the start. CEMs prefer larger bits (2 mm dia is good) as they can route more stacked PCBs in one go. A good CEM will give you a slightly lower price for a bigger router bit! * Slightly overlapping the end of the router path with the proximal mouse bite hole will minimise any sticking out broken bits. I was looking at a Naim Audio PCB recently, and I noticed their outer mouse bite holes are a larger diameter than the inner holes; not sure why they've done this, but I am sure there would have been a good reason, and I shall be looking into it... * I've seen CEMs do a sloppy job when they place their own router paths - it looks like they've just eyeballed it when panelizing. Pre-defined router paths make the CEM's panelization process easier and can make for a neater final profile. Mouse bites should all run in straight lines, spaced about 60 to 90 mm between centres, which is fine for a rectangular PCB but involves a bit of creativity where the profile is circular or curved. In the curvy case, the designer needs to add a squared-off router/mouse bite feature to complement the PCB profile mouse bites, and depanelization may involve snapping off bits in a particular sequence, in which case it's helpful to add such instructions on a silk or outer copper layer somewhere outside the PCB profile. I've been using a slightly modified version of Tom Hausherr's mouse bite specs for years with great success (google "The PCB Design Magazine, October 2013" for details), all I've done to tweak is to increase the hole size to 0.8 mm (from 0.5 mm) and added 2 extra holes to overlap with the router path ends. This makes for 7 holes (2 of which are effectively part of the router path), but I've also used 5 and 3-hole versions for smaller PCBs.
I'd recommend Altium to have a look at the kikit extension for Kicad, this panelisation tool is superior to what I've seen before. It still lacks a feature for panels with different PCBs but generating panels with mouse bites can be done within seconds.
I agree they need to have a tool that incorporates creation of mouse bites. I thought they would have added this kind of thing by now since it's such an obvious addition!
Great guidance. I would really like to see video showing guidance to use v-score, mouse-bites or other methods which can be used to provide option to separate pcb section . Let's say in your project you want to allow user user to separate pcb sections by for example snapping PCB. I see many videos showing v-scoring , mouse-bites for panelizing but not typically for PCB section separation . Best example would be ST dev boards which allow user to snap off programmer section. Also what would be the best way to design this PCB if you have high layer count PBC , how easy would be to snap it without shorting internal layers. In general some general advice and guidance for high layer count PCBs separation option would really help Thanks
I tried to cover some of these points in the video. I did not mention the layer count; for V-score and snapping the PCBs, the layer count does not matter as long as you use large enough pullback from the score region. In my example I showed the V-score applied mid-board with the intention of the user separating the PCBs manually. Same would apply for mouse bites, I have never seen guidance that refers to layer count limits with mouse bites.
Hi, i have a problem. i finished my PCB but i cant panelizations because i use 4 layer but when i import panel mode my PCB i cant see 4 layer just 2 layer and i see warning " Child and Parent PCB Design Layer Stacks are NOT compatible". How can i fixed this problem.
Please help me make technological fields with raf points. So that they are separated by the v-scrolling method, so that they can then be removed independently.
yes, in Altium is purely copy- paste click, only remember to have the same PCB technology (and layerstack) on all of the boards. Even when you use panelization tool it is still possible.
Is it really cost effective to do it for prototyping? The manufacturer will already do this by his own in order to produce your boards and others boards at the same time so he'll combine multiple design in 1 panel Another question: even in the case of ordering 1000 PCB, is really cost effective to do the panelization instead of letting the manufacturer do it depending on his capability? how much you'll save in this case?
If you do panelization by yourself and you know technical capabilities of your assembly contractor you can save a lot of money and time. Frankly speaking, your PCB fab always makes panel in the most pcb production - convenient way. The best cost saving effort is to do panel by yourself. Even for prototyping, you can i.e. replace costy routing indyvidual boards by v-cut.
Yes of course they will, but some people like to make their own panels. Mark H has shown a few examples where he has taken his own boards and applied solder paste himself with a stencil and squeegee, so it you want to do that by hand in a panel you will need to design your own panel and get stencils for it. Getting the stencils made and assembling yourself is less expensive than paying an assembler to put the design through reflow.
In the past I made a mouse bite footprint w/holes and 2 “cross-hairs” on a scratch layer (or add snap points) for the route tool path end points to snap to. You have to assign a mech layer to be the route tool path layer (vs using a board cutout).
Place multiple copies of that footprint around the embedded array and run route tool path tracks between the cross hairs.
I’ve also included such features in the source pcbdoc so they are automatically arrayed… but you will have to waive various DRC errors or make a rule to allow these holes outside the board outline.
I’ve also used a skinny route tool path as a V-Score line, but mostly this is to get some sort of realistic looking line in a realistic 3D view in Draftsman
I like making that kind of stuff into footprints (I have them for mounting holes and fiducials) but I never thought about it for a mouse bite, that's a good idea.
If the edge does matter for end use / packaging, then it makes sense to have the holes on the board side so you don't end up with burs after depaneling, you just have to have an increased keep-away zone. The number of holes and spacing is also a function of how much rigidity the board has. Sometimes the force to de-panel a v-score is higher or limited due to overlapping connectors past the edge. If the boards are not well supported, it can result in assembly failures. Unless you are doing the assembly yourself, it's almost better to leave the panelization to the board house you are sending it to.
Also if you are not using a depanelizer, breaking these boards / v-scores can induce a lot of stress of the FR4 layers and can be enough to crack near by vias from the board delam. Keep traces and vias away from these mechanical stress areas.
These are all good points, especially the fab house part of it, some fabs provide templates for customer-defined panels and the customer still gets it wrong! I like the holes internal to the board idea but you can always file off the excess material of they are on the breakaway tab, I guess most designers probably don't keep those filing tools around though. I've only made panels a few times but each time I get the manufacturer I'll use to review the panel to get their opinion on the hole count/spacing.
thank you so much for the clear explanations and tutorials!
Great video from Zach, as always. I definitely prefer to design in mouse bites at the PCB (rather than panel) level as it means I retain control over some very important criteria:
* Placing the hole centres 0.25 mm inboard from the PCB edge means any burrs generally don't need to be filed off - any such manual process is expensive! Adjust component placement and inner plane pullback to suit.
* Depanelization will put some big stresses in the local mouse bite area and delicate components such as chip Rs and MLCCs can easily be damaged in the process. Putting a keepout zone (2~3 mm) around the mouse bite makes for better yields and reliability.
* Adding a solder mask void area over the mouse bites prevents the coating splintering during depanelization.
* Internal planes can have a bit of pullback in the mouse bite area. The broken bits of PCB allow greater ingress of moisture etc., so a bit of extra margin is useful for reliability, and essential for high-voltage boards.
* The shape of any internal corners in the PCB profile is determined by the radius of the router bit, so best to define the router path and width from the start. CEMs prefer larger bits (2 mm dia is good) as they can route more stacked PCBs in one go. A good CEM will give you a slightly lower price for a bigger router bit!
* Slightly overlapping the end of the router path with the proximal mouse bite hole will minimise any sticking out broken bits. I was looking at a Naim Audio PCB recently, and I noticed their outer mouse bite holes are a larger diameter than the inner holes; not sure why they've done this, but I am sure there would have been a good reason, and I shall be looking into it...
* I've seen CEMs do a sloppy job when they place their own router paths - it looks like they've just eyeballed it when panelizing. Pre-defined router paths make the CEM's panelization process easier and can make for a neater final profile.
Mouse bites should all run in straight lines, spaced about 60 to 90 mm between centres, which is fine for a rectangular PCB but involves a bit of creativity where the profile is circular or curved. In the curvy case, the designer needs to add a squared-off router/mouse bite feature to complement the PCB profile mouse bites, and depanelization may involve snapping off bits in a particular sequence, in which case it's helpful to add such instructions on a silk or outer copper layer somewhere outside the PCB profile.
I've been using a slightly modified version of Tom Hausherr's mouse bite specs for years with great success (google "The PCB Design Magazine, October 2013" for details), all I've done to tweak is to increase the hole size to 0.8 mm (from 0.5 mm) and added 2 extra holes to overlap with the router path ends. This makes for 7 holes (2 of which are effectively part of the router path), but I've also used 5 and 3-hole versions for smaller PCBs.
I'd recommend Altium to have a look at the kikit extension for Kicad, this panelisation tool is superior to what I've seen before. It still lacks a feature for panels with different PCBs but generating panels with mouse bites can be done within seconds.
I agree they need to have a tool that incorporates creation of mouse bites. I thought they would have added this kind of thing by now since it's such an obvious addition!
Excellent
Great guidance.
I would really like to see video showing guidance to use v-score, mouse-bites or other methods which can be used to provide option to separate pcb section .
Let's say in your project you want to allow user user to separate pcb sections by for example snapping PCB.
I see many videos showing v-scoring , mouse-bites for panelizing but not typically for PCB section separation . Best example would be ST dev boards which allow user to snap off programmer section.
Also what would be the best way to design this PCB if you have high layer count PBC , how easy would be to snap it without shorting internal layers.
In general some general advice and guidance for high layer count PCBs separation option would really help
Thanks
I tried to cover some of these points in the video. I did not mention the layer count; for V-score and snapping the PCBs, the layer count does not matter as long as you use large enough pullback from the score region. In my example I showed the V-score applied mid-board with the intention of the user separating the PCBs manually. Same would apply for mouse bites, I have never seen guidance that refers to layer count limits with mouse bites.
Hi,
i have a problem. i finished my PCB but i cant panelizations because i use 4 layer but when i import panel mode my PCB i cant see 4 layer just 2 layer and i see warning " Child and Parent PCB Design Layer Stacks are NOT compatible". How can i fixed this problem.
Please help me make technological fields with raf points. So that they are separated by the v-scrolling method, so that they can then be removed independently.
Question: Is it possible to include different PCB designs in one panel?
Yes, my understanding in Altium Designer is that you would need to use multiple embedded board arrays to do it, but I have never tried it.
Yes, but it is not that easy.
yes, in Altium is purely copy- paste click, only remember to have the same PCB technology (and layerstack) on all of the boards. Even when you use panelization tool it is still possible.
Is it really cost effective to do it for prototyping? The manufacturer will already do this by his own in order to produce your boards and others boards at the same time so he'll combine multiple design in 1 panel
Another question: even in the case of ordering 1000 PCB, is really cost effective to do the panelization instead of letting the manufacturer do it depending on his capability? how much you'll save in this case?
If you do panelization by yourself and you know technical capabilities of your assembly contractor you can save a lot of money and time. Frankly speaking, your PCB fab always makes panel in the most pcb production - convenient way. The best cost saving effort is to do panel by yourself. Even for prototyping, you can i.e. replace costy routing indyvidual boards by v-cut.
You used mm dimensions when talking about the mouse bite approach and then you switched to mils when talking about v-scoring. Really?
The explanation I was most interested in was V-scoring, and you didn't explain it in detail, step by step.
Won't the manufacturer do it themselves ?
Yes of course they will, but some people like to make their own panels. Mark H has shown a few examples where he has taken his own boards and applied solder paste himself with a stencil and squeegee, so it you want to do that by hand in a panel you will need to design your own panel and get stencils for it. Getting the stencils made and assembling yourself is less expensive than paying an assembler to put the design through reflow.