15:35 You mention ensuring the ‘ADC running frequency’ is in the pass band of an analog rail’s filter. By running frequency, are you referring to: 1 } the ADC clock rate 2 } the reciprocal of the ADC conversion time 3 } the ADC sample rate 4 } some harmonic of 1-3 5 } or something else Just to make sure I have this straight before adding the concept to my stash of heuristics…
@@codures Can you please provide a reason? In my opinion, the harmonics of the sampling rate could excite the L-C-oscillator if you chose it's resonance frequency to be above the sampling rate. I would've relied on the L-C's output impedance at high frequencies to properly supply the analog section. Also, if you refer with the magnitude to the frequency relation between sample and resonance frequency, a factor of 40 would either require very low sample frequencies or a diminishingly small effect of the filter in filtering out the noise.
@@leopeters1021 if you cut to low you get an unjustified price increase (and possibly un rejected noise), if you cut to high you don't reject the *real* disturbing frequencies (1+MHz) for quantization. If your question points to some sort of aliasing in the sampled signal propagated from the sampling frequency, then you got a bigger issue: change the microcontroller!
I didn't get that either. The switching frequency of the buck converter for the voltage supply is usually much less than the sampling frequency of the ADC and the signal to be sampled.
Hi Zach, great video. You already talked about this kind of stuff but still i don't understand why all this big vendors suggesting using ferrite insted of inductors. Theres alot of app notes talked about this for example the AN583 of intel and VC7 of Renesas. We are actully applying some of this modern fpga's power supply filterring with ferrite (like phi filter) and they work just fine...
There are a few reasons for this. I think in the past they were a quick and easy way to dampen power supply noise without incurring problems during switching, and people kept recommending them despite the fact that chips kept getting faster. The other instance where it is used is not as a direct filter but as an isolator, where one rail (like analog rail or PLL rail) is resistively isolated from the main digital I/O rail, I have seen experimental results that are contradictory in this area, sometimes ferrite works and sometimes it does not even when tested at similar edge rates. Also sometimes the recommendation is based on functional tests from a test product that is never sold to market, so there is not enough investigation to determine what "works" means. Does the chip just turn on and do some I/Os work, or does the test board still pass EMI even with the ferrite and all I/Os switching? Not all situations are equivalent.
Yes I wanted to point out the same thing. Basically almost every chip manufacturer recommends without explanation ferrite beads instead of inductors. 😅 One very popular and old chip I designed a board for recently had recommended "LC" filters. And then when asked the manufacturer recommend a ferrite bead as inductor just because they tested their board this way. The usual recommended three/four capacitors values per rails instead of local decoupling + bulk capacitors are also bothering me..
At a high enough frequency, the inductor will become a capacitor and the capacitors will become inductors. This behavior isn't specific to ferrite beads...
What he should've said is that ferrite beads have a sufficiently high resistive component at high frequencies to provide damping leading to a low q-factor.
10n, 100n and 1u in parallel!? Really!? Probably better to make the cut-off frequency of the filter much lower than the operating frequency of the ADC by using large C on VDDA side so that the AC current on the VDDA side is supplied by the capacitor. Ferrite beads work okay in this scenario because the current drawn by the ADC is usually so small they act as inductors up to high frequency. I would also recommend to include the parasitic elements of the components used in the filter (particularly the inductor) because they can affect the frequency response significantly at surprisingly low frequencies.
Uhhh the simulation is missing the inductance of trace/pads/parasitics of the components (plus series resistances of the inductor and capacitors) so the "nice filtering" above 10s of MHz to GHz range is unrealistic (and goes again up)?
Every video is released right when I needed it most to help with my designs! keep it up!
Thank you for showing the simulation would love more simulation videos.
15:35 You mention ensuring the ‘ADC running frequency’ is in the pass band of an analog rail’s filter. By running frequency, are you referring to:
1 } the ADC clock rate
2 } the reciprocal of the ADC conversion time
3 } the ADC sample rate
4 } some harmonic of 1-3
5 } or something else
Just to make sure I have this straight before adding the concept to my stash of heuristics…
Following...
Assuming you're sampling at 200khz, your cutoff should be above. You choose the magnitude (3, 6,..., 40,...) depending on your application.
@@codures Can you please provide a reason? In my opinion, the harmonics of the sampling rate could excite the L-C-oscillator if you chose it's resonance frequency to be above the sampling rate. I would've relied on the L-C's output impedance at high frequencies to properly supply the analog section. Also, if you refer with the magnitude to the frequency relation between sample and resonance frequency, a factor of 40 would either require very low sample frequencies or a diminishingly small effect of the filter in filtering out the noise.
@@leopeters1021 if you cut to low you get an unjustified price increase (and possibly un rejected noise), if you cut to high you don't reject the *real* disturbing frequencies (1+MHz) for quantization. If your question points to some sort of aliasing in the sampled signal propagated from the sampling frequency, then you got a bigger issue: change the microcontroller!
I didn't get that either. The switching frequency of the buck converter for the voltage supply is usually much less than the sampling frequency of the ADC and the signal to be sampled.
Thank you Zach
Will you please provide any hardware design formulas for the PCB designs ?
Hi Zach, great video.
You already talked about this kind of stuff but still i don't understand why all this big vendors suggesting using ferrite insted of inductors.
Theres alot of app notes talked about this for example the AN583 of intel and VC7 of Renesas.
We are actully applying some of this modern fpga's power supply filterring with ferrite (like phi filter) and they work just fine...
There are a few reasons for this. I think in the past they were a quick and easy way to dampen power supply noise without incurring problems during switching, and people kept recommending them despite the fact that chips kept getting faster. The other instance where it is used is not as a direct filter but as an isolator, where one rail (like analog rail or PLL rail) is resistively isolated from the main digital I/O rail, I have seen experimental results that are contradictory in this area, sometimes ferrite works and sometimes it does not even when tested at similar edge rates. Also sometimes the recommendation is based on functional tests from a test product that is never sold to market, so there is not enough investigation to determine what "works" means. Does the chip just turn on and do some I/Os work, or does the test board still pass EMI even with the ferrite and all I/Os switching? Not all situations are equivalent.
Yes I wanted to point out the same thing. Basically almost every chip manufacturer recommends without explanation ferrite beads instead of inductors. 😅 One very popular and old chip I designed a board for recently had recommended "LC" filters. And then when asked the manufacturer recommend a ferrite bead as inductor just because they tested their board this way. The usual recommended three/four capacitors values per rails instead of local decoupling + bulk capacitors are also bothering me..
For the first time in my life I see such a capacitor's symbol....
At a high enough frequency, the inductor will become a capacitor and the capacitors will become inductors. This behavior isn't specific to ferrite beads...
I agree with you - the frequency of self-resonance of the inductor in the specifications seems to hint that there is a parasitic capacitor...
What he should've said is that ferrite beads have a sufficiently high resistive component at high frequencies to provide damping leading to a low q-factor.
10n, 100n and 1u in parallel!? Really!?
Probably better to make the cut-off frequency of the filter much lower than the operating frequency of the ADC by using large C on VDDA side so that the AC current on the VDDA side is supplied by the capacitor.
Ferrite beads work okay in this scenario because the current drawn by the ADC is usually so small they act as inductors up to high frequency.
I would also recommend to include the parasitic elements of the components used in the filter (particularly the inductor) because they can affect the frequency response significantly at surprisingly low frequencies.
Good video but would have been great to see you fix the circuit and show the improvement in the simulation.
Why is he using the "short citcuit" symbol for capacitors?
What are you talking about
Since I think that was a design submitted by someone else something probably went a bit funny when importing that particular file.
same question) strange symbol
@@oliverer3 File was not converted by me, but yes strange symbol choice
@@Zachariah-Peterson it's always good to see you around!
Uhhh the simulation is missing the inductance of trace/pads/parasitics of the components (plus series resistances of the inductor and capacitors) so the "nice filtering" above 10s of MHz to GHz range is unrealistic (and goes again up)?
He does mention that he hasn't included parasitics etc.