Intel Is Flipping the CPU Upside-Down
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- Опубликовано: 31 авг 2023
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Learn about backside power delivery (branded by Intel as "PowerVia") and what it means for your next processor.
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Who knew the backside would be ideal for power delivery.
aye yo
Pause
Linus "Power Bottom" Sebastian strikes again.
😮
😂😂😂
I'd love to see a Techquickie about the *current* status of non-silicon based transistors (GaAs, GaN, etc...) and where the chip industry is with transitioning off of silicon based chips.
Why would they transition off of silicon? If anything they are trying to integrate more things on Si eg. silicon photonics
@@shanent5793 Main advantages of GaN is lower heat generation and higher heat survivability (silicon chip will melt above 120*C, while GaN chip will melt above 400*C).
So a GaN CPU could be overclocked a lot more without getting into heat limitations.
Is this a thing? I'd love to see them switch to GaN chips if possible and I bet ppl will be willing to pay a premium for such dramatic increases to performance!
@@hubertnnn Devices today are less overclockable than in the past because the manufacturer bins them and sells the faster or more efficient chips at a premium. Changing the material won't change overclockability
@@shanent5793 Changing materials would not only change overclocking capabilities, but also literally every other quality of the chip. That's kinda what changing materials does. Wood and reinforced concrete have their own unique qualities, vacuum tubes and silicon transistors have their own unique qualities.
99.9% the "manufacture cost savings" aren't for the benefit of the consumer and we wont actually see cost reductions.
This
They give you more chip when they feel threatened. Amd been such a good threat lately. They could also probably jack up the voltage/frequency since they don't have to worry about the wires acting like transformers and capacitors as much.
Welcome to the real world
Buy intel stock, then you can enjoy sticking it to the consumer like all the other share holders 😅…
All jokes aside, it does tend to result in slower cost growth over time for consumers. Ocassionally you get years where intel gets super desperate and these type of advancements give them headroom give out deals…
They are, in a way. This, like all technological improvements in performance semiconductors, will allow chip makers to tape out higher-performing chips in the same price segments they've been using for ages. You get more performance for the same price.
For those confused, the picture shows you the new change. The transistor is now sandwiched between power and data. That's how the two are decoupled/separated.
The concern is the transistor is now insulated on both sides rather than being on one of the edges.
Although, as some point out, the whole package gets hot so cooling it shouldn't be much different. Perhaps there will be more backplate cooling to help dissipate more heat on both sides of the chip?
Another issue is that this hugely increases the number of layers in chip which means there's more manufacturing steps. That's why it wasn't done on earlier nodes, the improvement wasn't enough to offset the increased cost.
@@spankeyfish They're saying this process will be cheaper to manufacturer, outside of the initial setup costs.
@@83n80y Well the slides do say lower yield, so it a way it costs more. Like always, nothing is free, but you pay a bit more for the process and save more in other places, which makes it a net benefit. Like if your chips cost 10€ (number are completely random) to make and every 100th is defect due to power via that makes every chip ~10ct more expensive, but if you can make the die 5% smaller due to power via, you save ~50ct per die, so it's a net benefit. You also get higher clocks and stuff, which do not save you money, but increase performance, which might make you more competitive, which also makes you more money and much more. You win some, you loose some, just make sure that is a net benefit in the end.
@@cromefire_ Good stuff. What would happen if Intel starting making nets? What would be your guess on the nets netting them net benefit from the net profits? 😁
"Although, as some point out, the whole package gets hot so cooling it shouldn't be much different." - even at steady state, the thickness and conductivity of insulation makes all the difference. Even if you leave it for hours and hours, there will always be a temperature difference between the transistors and the outside of the CPU, depending on what is between them. It's just like how your heat sink is probably cool or slightly warm to the touch, while your CPU core is still above 70 C.
Glad to see these changes are finally happening! :) Intel finally gives a solid reason to change socket :P
AMD is better
@@Ladioz🗿
In like 10 years
bruh what changed
@@smalltime0that 10 years has passed lol
AMD has been giving Intel Backside Power Delivery for about the last 3-4 years now.
Pause
And yet intel still own most of the market share
@@x0Fang0xof course they do, doesn’t mean they’re making money or maintaining their ground. Any market share lost to competition in something like hardware is very hard to recover, as often times it’s lost to bad experiences had by consumers.
@@x0Fang0x Popularity does not always equate to quality. Taylor Swift, for example.
idk about the more expensive options but intel budget cpus absolutely blast amd
Fun fact: CPUs were invented in Australia, that's why the front side is upside down. It's also why they're referred to as "chips" and not "French Processor Units", and when they're hot we cool them with Tomato Sauce, not Ketchup.
articles are saying cpu's were invented in the united states by intel engineers ted hoff and stan mazor. ted hoff is from rochester nyc
@@Kelly--all lies. The rabbit hole is deep
This is actually true. I remember back in the day they used to come wrapped in newspaper too. Was definitely a different time.
@@deathbydeviceable I see you’ve played knifey chippey before, mate
@@avonperera2187haha i came here to post something like that - now im both happy and disappointed 😂
If I understood right then this would push more heat towards the motherboards socket. I imagine the pins, the socket and cooler mounts acts as some sort of thermal interface already, but this would motive motherboard makers to add heat spreaders to the socket itself for example to the back of the motherboard, where the cooler reinforcement usually sits.
that or the cooler mounts would have active backplate cooling as well.
@@lordmage tbh this sounds like a better solution, cooling solution remains modular. but again more modular = less efficient so we can just hope
The differences are tiny. In your current CPU the socket still gets hot despite the chip sitting on "multiple layers of wiring and plastic and pins and whatnot" it's not a big deal, hardly any difference, the whole package gets hot anyway.
Putting the heat-emitting parts next to the motherboard, away from easy access to fan cooling, seems a bit perverse. Also this is only going to achieve about a 5% performance gain.
@@lawrencedoliveiro9104Hopefully, this process helps make it more than 5% less expensive.
Can you make a video about why some old cpus had the chip on same side as the pins?
Probably just easier to build. Didn't have to worry as much about cooling or signal crosstalk back then so there was no reason not to take the simplest route.
Fun fact, if its a FCLGA the FC is already for "Flip Chip". So after 50 years they are actually going back to the original way 😂
“Lower costs”…yeah, for Intel. There is absolutely zero chance this gets passed to the consumer. As noted, the new technology will increase the price to roll it out. Just don’t expect it to go down lol…they’re counting on you to accept the new price and forget.
Intel has had competivie pricing ever since 12th gen and will probably continue to do so as long as AMD keeps up the competition.
every excuse to raise prices will be taken and made...
"the janitors poos are stinky and a butterfly in Mexico farted!"
"add 3%"
@@cozmorules6983That's irrelevant, if they save money they should pass some of that on to the consumer. This is nothing to do with current pricing
ok so if they raise prices how will they compete? they'll just bleed money to AMD then.@@kazzxtrismus
Every aspect of chip production is to lower costs. The chips we can get now are many orders of magnitude more capable than the ones that cost the same a decade ago.
As for market price, all the advances in chip cost are the reason we can get so much more for the same price. The prices can't not be passed on to the consumer.
So basically Intel's changing from a power top, to a power bottom.
Whatever works.
Hahahaha, nice
That doesn't sound remotely gay at all! 🤣
@@marcse7en technically being a top or bottom has nothing to do with what gender you prefer in bed.
There are plenty of power bottom males in heterosexual relationships
Actually Intel doubles surfaces through which the wires can go to transistors that allows to double their thickness. While resistance of wires and heat dissipation in wires is reverse proportional to square of wires section. This shall make CPUs a bit cooler, voltage of the power source can be less, while CPU frequency can be increased.
Also this may be first step to multi layer transistors deployment. Nothing prevent to build sandwich not only as Power+transistors+Data wires, but also Power+transistors+Data wires+transistors+Power. This can double the number of surfaces through which wires can go to transistors again.
Won't power stay on top and data move down? I'd imagine the power side would be both hotter (because all the power goes through there) and dissipate heat much faster (more and bigger wires).
I did PCB layout for about 25 years. A typical PCB layout has semiconductors on the two outer (surface) layers, signal traces on adjacent inner layers and power/ground layers interspersed between the signal layers.
So is this like taking the components and putting them near the center/interior of the stackup with the signal layers on one side of the stackup and the power/ground layers on the opposite side of the stackup?
This would dramatically alter the impedance calculations for the semiconductors.
that what I understood as well (for Die manufacturing process ) thought I cant seem to understand how to feed the power rails as the signals will face the package upper side because if the flip so that means that the power will be facing the Lid , so does that mean back to wire bond for power and ground ? but maybe I missed something in the explanation .
@@loldualol From what I understand power and communication with the motherboard will stay on the bottom just as it is now.
The only thing that will change is internal transistor-to-transistor communication will be moved to the top/lid side (closer to the heatsink).
what I picture is 2 bga's back to back....the top side balls are the power/ground between transistors and gap filled with thermal conductive epoxy ......the lower bga is a normal chipset ....@@loldualol
Good concept for a video I don't know how much the audience will embrace this, but it's good to have 1 - 3 near production technology terms defined even if it doesn't find a large audience.
I don't know about any specific chip-making topics to cover, but I'm sure you have a solid backlog of them, so…cover them all.
I'd watch even 20 minute version of videos like this.
"Intel is flipping the chip"
"Actually everyone is doing it"
"Chipmakers" don't have to use more complex technology for this issue with power as more pins are added to chips.
SEMI-CONDUCTOR companies have to use more complex technology. You know, TSMC, Samsung, one part of Intel's business?
It'd be nice to see a video on gallium nitride
I see a couple problems right away..
- Reduced cooling capacity because of the bigger gap
- While the majority of signal connections are internal, those that need to come out back to the motherboard still need to pass somewhere near the power wires (introducing some of the noise back into the equation) and the signal wires must be longer, which means once again greater resistance, and more latency (which we know even RAM isn't a fan of uneven/longer wire lengths).
3:16 Intel already tested PowerVia with Intel 4 process and noticed increase of power dissipation per mm2 with transistors density increase that becomes possible due to PowerVia tech.
The bigger power contacts throughout may actually improve the thermal issues: you can cool larger traces that reach down into the chip. I'm still surprised that we haven't seen doublesided chip sockets with coolers each side or mobos with cpu on the underside right underneath ram and gpu slots.
The biggest heat points are going to be at the contacts then every time the connection steps down, even if it's a solid piece. As the power is diffused through the circuits passed through the silicon the heat generation will be less at each point. I'm sure someone already knows (hopefully will contribute) the heat at the power contacts on the silicon vs the heat of the internal IO vs processing.
I don't think moving the power delivery will really change cooling much if at all. It's probably only going to be the thickness of the current protective layer, heat generation shouldn't be much of a factor and conductivity should be about the same.
If I understand that correctly the vertical transistors (the source up and drain down)will be introduced instead of the lateral ones.
keep up the good work guys. love all that you do!!!
They have a terrible work environment thanks to linus
@@soccerguy2433 i can not speak for the employees of LTT so i do not know there working conditions. im a outsider looking in through a curated lens. in the years i have been watching LTT i have not got the impression of a bad work enviroment.
and if there is a bad work enviroment i hope the people affected reach out. one person with a bad work experiance does not mean all have had such experiances. and that sucks for that person and it should not have happend. Most people that work with linus seems to like him. i dont think linus is causing a bad work envrioment for everyone. So i think your wrong.
So, does that mean that deliding the CPU to apply liquid metal now shorts the CPU power input? Is it any more risky than before?
Did you guys put vertical stripes on the background gradient to mitigate the blockiness after youtube's compression? It looks so much better!
"Backside power delivery" is what I call my "male connector!" 😂❤
BAM!
I searched "backside power delivery" at work to find out more. My meeting with H.R. is first thing tomorrow morning
I doubt excess heat buildup will be any more of an issue than it is today, seeing as most of the top silicon on current CPUs is empty, just there for ease of manufacturing and structural stability.
Just a heads up, may want to consider removing the LTX 2023 link, I don't think tickets are available anymore.
so does this mean we will have wires coming out of the heat spreader when we mount them on motherboards?
Wouldn’t the front side layers of copper wires actually be more thermally conductive than the raw silicon itself? Unless the die has to be thicker overall to support the wires, reducing efficient thermal transfer to the heat spreader.
Well reducing the resistance of the power wires also means less heat, so in the end it might actually output less heat overall and be just as easy (or hard) to cool like any current chip, but ofc that´s only theory.
Since Intel will most likely try to increase those clocks even further, they will probably loose the "heat advantage" and the additional layers may actually become a problem.
But we´ll see i guess.
Most heat is generated by the transistor itself, the heat from too thin wires is tiny comparing to that.
Think putting an electric hand warmer next to campfire, yeah, it generates extra heat, but that heat is irrelevant.
@@hubertnnn you think 105W of power through a few copper wires as thin as a human hair isn't contributing to the die's total heat output?
Makes no sense to me.
If we think about the core voltages these days at barely around 1V, that would pretty much be 105 Amps of current which is a miracle on it's own tbh
@@MultiWirth Its not pumping 105W through a human hair wire, its pumping that through millions of human hair wires, so each has to transfer very tiny amount of amps.
Its the same as with cables, if you cut a cable you will find that most of them are made out of hundreds of tiny wires, so the load is distributed between them and you don't loose a ton of energy into heat due to small wire.
If power is not coming from the socket, how is the chip then powered?
I don't know if it's actually better but i guess time will tel us if turning upsidedown the design would be actually better for the chip ,as mentioned in the video it may or not may be related to the actually heat spreading of the transistors inside chip . Maby the more lack of via and long but thin traces will compensate and add a plus for the whole circuit as less RLC component can be found in longer traces .
No picture of the chip and a Solidworks commercial, nope.
Nice knowing who else helped out this together at the start.
The majority of CPUs already have a lot of blank silicon on their dies between where the transistors are and the IHS. The actual CPU is only a few microns in thickness.
I love the typo on the pic. Higher voltage droop.
That waver they bond to the surface would be very nice if it could be silicon-carbide. Its thermal conductivity is a lot better.
So do you squirt out your thermalpaste on the backside or na
The only question is: why now? Haven't the engineers seen the backside of chips decades ago?
Silicon chip is still to the one side of overall sandwitch. Nothing visually changes for the chips with PowerVia. Intel just declares its innovation leadership over other manufacturers like Samsung and TSMC, so their investors understand Intel shares future.
Tiny Riley at 0:15 was a class touch
Chip makers should think about on chip cooling channels as well. Perhaps micro channels on the die, with then concentrate heat, which is then cooled by conventional cooling. Also high frequency RAM chips can use optical memory taking advantage of reversible photochemistry.
Before you even said it, I was thinking that the power delivery should be on top for cooling. Disregarding case size limitations, how feasible is it to cool a CPU from the underside of the motherboard?
Double side cooling of chips is inevitable solution for future developments.
Welcome back LMG💪🏻💪🏻💪🏻
Just spoke to someone who works an Intel. 1 and 1.5nm being designed! AI logic is a big concentration for them
i think there was also a different company doing this for an ai accelerator. they called it trench transistors or something does any one know their name ?
Yeah the "backside power delivery" a technique that usually lives one party satisfied, whilst the other is left in pain!
no pain no gain.
So it's kinda like a backside-illuminated CMOS sensor?
yes please more technical topics like these. 👍
Wouldn't it be better to cool from the power side which contains more copper?
With the seperation, where is the power going to be delivered from? If its the same pins, routing the power through has its own issues.
I THINK that the transistors sit on the boundary between the power side and the data side. Most wires in a CPU are just connecting transistors and have to weave above and below each other. Only the transistors need to be connected to power not the wires carrying the data
@Riley "Via" is pronounced vee-uh, at Intel (no idea how the other companies pronounce it) like the power and signals are transferred between layers, via the vias.
It's pronounced that way everywhere else, not just at Intel.
@@sirlesliechaoclearly it isn't pronounced that way at LTT.
Thanks for the scoop on this new technology.
It is pronounced VeeAh. Referring to the Vias that make connections between layers on the die.
2:35 "chip engineers like to have fun" I sure hope that fun doesnt eventually evolve to installing spyware in chips
Would only work if they code them to run at boot up and it opens a network interface and sends data from os and programs running on the cpu to the manufacturer
Old news. NSA already has backdoors on the chip level. Whatever OS you use is compromised.
I must admit. When I saw the title I was imagining some power pins from the cooler side to power CPU on top ;)
You need to do a video that clearly explains the true scale of this Nano-engineering.
Most people have no clue what nm actually means.
As the smallest feature size is about 4nm, this isn't the size of the actual transistor. These transistors actually vary a lot in size depending on the task there were meant for.
There is also the argument that chip makers should be using a different measurement scale, the Angstrom.
1 Angstrom is approximately how large an atom is, and is 0.1nm in size.
So a 4nm process is really, 40 atoms (Angstroms)
The distance of the transistors from the IHS shouldn't make a difference. Silicon conducts heat about as well as copper. Silicon dioxide is a little worse but still much better than thermal paste.
These types of videos are what the internet was really made for, great job 👍
What about Tape Storage which IBM tried. Seriously its pretty cool
What happens if the front falls off?
There is an error in the video... The chip would actually be better cooled since the copper would provide a better heat path through the silicon since the cooling Happens in the opposite site of the Bulk not the wire side... I only say WLCSP Package...
Can someone explain how making wires shorter increased resistivity i thought resistivity was proportional to length
I love chip talk! This is so fascinating! Thank you!
So why they exacly dont make like a one layer of pcb goes with power and another laier on top with data transfer ?
while they're at it they should take half the power delivery pins out of the socket and run power ground through the heat spreader.
They can power chips with lightings going through the air over chips.
The savings of using this method will be worth it, because now they charge the same for the product but earn 20% more! 😅
I have a horrible stomach disease and I don’t think you guys understand how nice it is to have a friendly voice there threw all the pain.
ANYTHING that reduce voltage drop also reduce power consumption, and thus, heat production. That mean chips running slightly cooler. That alone, will mitigate any heat dissipation issue.
On my way to tell my wife I need to make a power delivery to the backside
My chip question: I'd like to know how they get Ruffles to have those tight ridges.
I wonder how well that goes along with 3d cache
2:31 I thought why my screen rotates 😅
Could they not also have “cooling wires” that go through the entire chip that conduct the heat better within the chip and out the top exposed to the heat spreader for better cooling?
I’m sure there’s a knowledgeable chip expert here which can explain why this is/isn’t a good idea
Would those cooling wires be a different material to the power delivery wires ?
If not, then the power wires can also be used for heat transfer.
Don't really need that. Silicon itself is a pretty good thermal conductor. So, as long as it's solid (and there's very few silicon processes that leave voids, so it almost certainly is), it'll conduct heat just fine. Also, they'll probably pack the power routing metals and vias as dense as they can get it (better for thermals and power delivery), so that helps too.
My idea was to specifically expose the conductive metal on the top of the chip and not covered in the plastic chip coating.
@ccoder4953 Thanks for the response! Makes so much sense that silicon is a good thermal conductor! It voids my idea, but I’ve learned something new today!
(Sept 2023) - You’ve got my attention for sure. insightful video ! Q: Is there a “gage number” to define these very fine power wires? Like 28 or 32 gage or smaller. (I am working very hard to try to understand this concept!)
to be more explicit: voltage drop = resistance, resistance = heat, heat = less performance.
Finally! Is about Time it gets out in RL. Looking forward to the newest Consumer versions.
But how do they put the ridges in Ruffles?
Last night I tried some backside power delivery with my wife... it didn't go well
🤨
BAM!
This tech holds lots of promise, it could probably initially create issue with thermal conductivity but future iterations might but more efficient.
Wait, this is just flip chip with connections both sides - and intel did flip chip in 2000 on socket 370.... FC-PGA was introduced by Intel with the Coppermine core Pentium III and Celeron[2] processors based on Socket 370.
I hope this works out in the real world and doesnt lead to overheating, this sounds like a rather interesting idea.
Hopefuly by the time I have the money to build a new computer in the future, I'll be able to benifit from this (or it'll be such a failure that we'll be laughing at this idea in 5-10 years)
how about a video on microchip's AVR architecture
PLEASE PLEASE PLEASE cover that new PHOTONICS chip Intel was in the news for... and I don't just mean WHAT photonics are, but an IN-DEPTH look, just like this video, into it.. maybe about how the light processing/transistors are, how they work, and how the photons then get converted to electrons.. but then also WHY THIS ISN'T BEING DONE MORE.... what's the hang up? cost? speed of processing? lack of interest?
- - I have a TON of topics I would LOVE to learn more about, but I'm not sure you guys want to go into such in-depth looks... maybe you could do a series that covers a deep topic, but throughout the series you start with the basic understand that most people would know, then each episode we learn another part that is more in depth, but you need to see each episode to understand the next one..... BUT I don't see you guys doing that here, but quite frankly I'm surprised you went as in-depth as you did here... color me impressed and happy :D
Definitely need to revisit the stacked memory configurations that AMD is working on, I'd love to know how TSMC is handling this and AMDs tweaks simultaneously
IIRC Intel makes their CPUs in-house, which is why they were struggling with smaller process nodes that TSMC had been nailing for years. I believe their GPUs are TSMC though.
Via is pronounced Vee Ah
idea for next time measuring wireless signal you see stuff like -88dBm, what is good, what is bad, what is dBm is this some kind of sound? why is it negative?
dBm is just a measure of power ratio between the linear value and a reference value. For dBm it a mWaty. dB are a log measure so you have that any value in dBm is given by
Val_dBm = 10*log10(Val/1e-3)
In this case Val is expressed in watts
As long as they don't solder or weld it to the board, they can do to the CPU whatever they want.
Ideally they should make several power plates, sandwiched between two ground plates. Then a hollow silicon stem should be formed through to the appropriate layer.
Additionally, there should be a second ground plate on the top above the signal wires. While this adds a tiny bit of signal wire capacitance (always a downside) it also allows the ground plate to be used as a heat spreader with minimal distance.
Personally, I'd also flip the design putting the power on the top and the conduit signal on the bottom. This of course means thinning out the power layer instead.
We’ll be sure to let the fine folks at Intel about this “ideal design” they missed in the comments section. Thank god the hundreds of electrical engineers working on this project for years have you to think of all this stuff they collectively missed.
Is it nap time after snack time?
sounds like hard to understand but very informative. I like it.
so it's the flipped flipchip then...
The logic sounds similar to BSI, backside illuminated sensors
*Doesn't this mean that the 15th gen Intel is going to release WILL NOT SELL because these new chips are also near their launch?*
Unless ofcourse they use the same socket, in which case this new tech should also release for 12th 13th gen to bring cash quickly
Power via may be part of 'Intel 20A' and 'Intel 18A' processes. So when the respective CPUs are going to be released is related to 20A and 18A processes used for production.
I see the great side to reduce the CPU cost, but what about the socket that would be on the motherboard ? I guess the socket gonna be more expensive to make
the chip isnt on the socket - it is on a carrier pcb
As I understand, the socket is now gonna be the one handling power, while the chip will mostly be left with only transitors.
Might still be in a lga form factor as a whole with a carrier board, might not
@@aonolokithan you didn’t understand the explanation. Backside power delivery only separates power and data on the die side of the chip the substrate itself doesn’t need to do that since you got a lot more space to work with preventing the issues of too small wires. The only thing that might have to change to accommodate this is the pinout of the socket (i.e. which pins carry data and which carry power).
Explain the new Intel photonics stuff
Backside power delivery was my nickname in highschool.
That should fix the problem with Moore's Law.
seems legit
Moore's law will still apply at one point
That can’t seriously be the name that they’re going with?!! If this video had come out on 1st April I would not have believed a word of it