Image Processing on Zynq (FPGAs) : Part 1 Introduction

Поделиться
HTML-код
  • Опубликовано: 11 сен 2024

Комментарии • 24

  • @sundramkumar5655
    @sundramkumar5655 10 месяцев назад +1

    looking for these kind of explanations ,finally got one such video. brilliant teaching sir

  • @isaackumba2688
    @isaackumba2688 Год назад +1

    I really enjoy all of your video , Thanks for sharing your knowledge

  • @saadtiwana
    @saadtiwana 3 года назад +1

    Very good explanation. Thanks for sharing!

  • @vinodtadiparthi1
    @vinodtadiparthi1 3 года назад +3

    Excellent video. Nice explanation.
    Where can we get the presentation..

  • @nikhilpawan6124
    @nikhilpawan6124 3 дня назад

    sir but how to do it for video processing?

  • @amalsal9559
    @amalsal9559 Год назад

    Many many many thanks

  • @alanlvarghese122
    @alanlvarghese122 Год назад +1

    Thanks a lot for the tutorials
    Is there a way to add defective pixel correction core to my project
    If not how can i implement a custom core to correct defective pixel using microblaze through axi lite interfacing

  • @Mrgr2pen
    @Mrgr2pen 3 года назад

    I might be missing a point, but can't work with 2 LBs and 3 registers (to store 3 pixels)? As soon as we store the first two lines and get the first 3 pixels of the 3rd line, we can start processing and send out the first line. Also, as we send out the first line, we don't need the 1st line in the LB anymore. So we push in the 3rd line in the 1st line's LB. Or did I miss a point?

  • @SandwichMitGurke
    @SandwichMitGurke 2 года назад

    thanks a lot for this!

  • @Alexey-qs6nr
    @Alexey-qs6nr 2 года назад

    thank you!

  • @ayasaad1856
    @ayasaad1856 3 года назад

    hello Si, how to store the video capture from camera to memory? are this project applicable with video capture ? or no?

  • @rohitakki2504
    @rohitakki2504 11 месяцев назад

    Sir ,can we implement this project on spartan 6 fpga?

  • @juhisingh7654
    @juhisingh7654 10 месяцев назад

    sir how can i get ur ppts ?

  • @abhijitkumar5696
    @abhijitkumar5696 4 года назад

    Sir, can't we do it without the interrupt signal?. I mean we can continuously stream the data without the interrupt signal from IP!

    • @TheVipinkmenon
      @TheVipinkmenon  4 года назад +3

      Yes. But you will have to change the line buffer design as a shift register based implementation and needs proper aci stream slave interface to the line buffer. Directly wiring ready signal from output won't work. Just search for line buffer design and you will see papers on shift register based ones

  • @varunbansal4192
    @varunbansal4192 2 года назад

    Sir do we require a FPGA to make this project?

    • @burgerking220
      @burgerking220 2 года назад

      U can make the ip but will need device eventually

    • @cihankocakir6809
      @cihankocakir6809 8 месяцев назад

      ​@@burgerking220Im sorry i'm just starting out on this topic. So as a result, can't I do this project only with simulation without an FPGA card in my hand?

    • @Jonathan-ru9zl
      @Jonathan-ru9zl 3 месяца назад

      @@cihankocakir6809 FPGA are pretty common and cheap today

  • @marwan819
    @marwan819 3 года назад +1

    Dear Sir
    Thank you very much for your helpful information.
    I hope if you can give me an advice:
    I want to use FPGA to implement moving object traking.
    Which is the suitable algorithm for that?
    Thank you and I am looking forward to hear from you.
    I hope if you can give me your email if possible.