BASE ISA

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  • Опубликовано: 11 сен 2024
  • Presentation by Andrew Waterman at SiFive on May 7, 2018 at the RISC-V Workshop in Barcelona, hosted by Barcelona Supercomputing Center and Universitat Politecnica de Catalunya in Barcelona, Spain. To view the slides from this session, please visit: riscv.org/2018...

Комментарии • 14

  • @LinucNerd
    @LinucNerd 4 года назад +5

    Great talk, very informative!
    I seriously hope RISC-V processors will become the main CPU in PCs one day.

  • @ComputerwalaOfficial
    @ComputerwalaOfficial 3 года назад +6

    RISC-V will be next ARM

  • @parkershaw8529
    @parkershaw8529 Год назад

    Thanks for the insight into the various RISC-V ISA extensions! Very enjoyable to watch.

  • @coolwinder
    @coolwinder Месяц назад

    Where us that presentstion on memory/fence instructions by Dan Lustic?

  • @Filaxsan
    @Filaxsan 3 года назад

    Great talk! Thanks Andrew!

  • @vinamarora7049
    @vinamarora7049 4 года назад +1

    Really nice talk!

  • @EnsignRho
    @EnsignRho 6 лет назад +4

    At around 2:40 to 2:50 I had to restrain myself from throwing something at my computer's monitor. I opted instead for some verbal schooling of Andrew Waterman from the comfort of my desk at home (even though he couldn't hear me, I felt better teaching him a thing or two about the early CISC philosophy, and how instructions like the AA* family did help out in the early days, and how they're now maintained only for legacy purposes). :-)
    AMD reclaimed some duplicate instructions for REX extensions. There's nothing to prevent AMD or Intel from adding a flag to disable legacy decoding of some rarely-used opcodes, to allow new single-digit opcodes to replace more common operations. It might even be interesting to allow some macro definitions to be introduced which allow small code sequences to be triggered by some of those reclaimed opcodes with a new CPU extension.

    • @EnsignRho
      @EnsignRho 6 лет назад +1

      I've watched this video a few times, and that part of the video around 2:40 consistently infuriates me. I wish presenters would understand more about computer history and the goals present in people's thinking at the time. Before RISC there was CISC, and the smaller single-byte opcode able to perform multiple separate steps was an advantage back when memory was expensive. It had a very valid reason for coming into existence when it did, and to summarily discount it when you've never been using computers in a pre-year-2000 world ... it just isn't right to disparage things you have not given sufficient thought or emphasis to. It's like the epitome of arrogance to think your thinking is so right, and their thinking is so wrong. It just infuriates me to see such a grand nonchalant display of pride and arrogance in presentations like this.

    • @BruceHoult
      @BruceHoult 5 лет назад +8

      @@EnsignRho this comment just shows that you don't understand Andrew's point. Using 1 byte opcodes for very rare instructions (fewer than 1 use in every 256 program instructions, on average) such as AAA, AAS, AAM, AAD, DAA, DAS does not improve code density on machines with limited RAM, it *hurts* it. They should have been tucked away in a secondary code page, freeing up valuable 1-byte opcodes for things that might be used more frequently. The Motorola 6809, also released in 1978, did a much better job of this.

    • @EnsignRho
      @EnsignRho 5 лет назад

      @@BruceHoult Thanks for the info, Bruce.

    • @parkershaw8529
      @parkershaw8529 Год назад

      @@BruceHoult Agreed, even in their prime time, I doubt AAA etc justified their encoding space.

  • @Nicknamelikeyours
    @Nicknamelikeyours 5 лет назад +2

    He talks too fast

    • @derrylab
      @derrylab 3 года назад

      set playback speed to 0.75

    • @esra_erimez
      @esra_erimez 2 года назад

      I have the speed set to 1.75 and can understand him