Serial in Serial out Shift Register

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[@chinthalavivek759]

Sis mi videos valla ADE pass avadaniki chala use aindhi thank you so much💛

[@amithnaik6335]

Today I have BSc final exam. This video helps me lot. Thank u mam😍

[@alish3096]

you are better than my professor.

[@mamtauikey4146]

Shift register is my concept clear.
Thanks to much mam

[@seriousreviews1961]

Bsdiwala tera concept h re ee

[@arch0725]

Your teaching is too good mam all studuents are understandable

[@vipinyadav2594]

inglis

[@salmankhanumrani213]

Wow amazing.. madam mashaAllah so beautifully u have taught.. ur student from pskistan✌🏻

[@rajeshjena5508]

Massalllah blast

[@salmankhanumrani213]

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[@umarverma]

@@rajeshjena5508 bruh😂😂

[@rajeshjena5508]

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[@ujjwalsubedi4278]

out of all the videos i watched this video is awesome and i understood so fluently . thank you very much from nepal i just suscribed ..keep up the good works

[@sayantandas9503]

really !

[@pranalis9997]

Best way for understanding basics clearly ever 👍

[@ManojKumar-bx6bw]

very helpful mam...........needed more information in practicals like include IC nos.

[@krishnabn5019]

Extraordinary explaination.thanks a lot!.

[@zunaidakhtar5006]

Awesome explanation mam ..Thanks!!☺

[@sayantandas9503]

faltu explanation

[@mangosushii_.]

Thank you teacher! Great explanation😃

[@payal8084]

Thanks mam you helped me a lot

[@marufhasan4668]

Thank you.

[@akashbhati4211]

Very helpful mam...

[@chinmayamj5615]

Thank you so much mam 🙏

[@ChandraSekhar-pu5ei]

Fantastic explanation

[@lakshmighodake7033]

Thank u mam❤

[@lukesequeiravaz5453]

Wow wonderful explanation

[@shouvikmondal1977]

Easy method to understand.

[@maneendradamanaboina402]

Easy to learn & to write

[@sudipbera5629]

Thanks ma'am

[@randomstuffs5982]

Thankewww so much mam❤️

[@umasankarvetsa6739]

Well explained

[@MdIrshad-ym4ic]

thanku so much mam

[@samusamu2644]

Thankyou mam 🤎

[@maneendradamanaboina402]

Superb

[@vinayakthote8411]

Thanku mam

[@victormaxwellpeters9771]

Respected mam, Since individual D flip flop is transparent (data in equals data out) what if the input signal in flip flop 1 goes to the 4th flpflop through intermediate flip flops before the end of first pulse?? What decide decide the duration of individual pulse??

[@manasjhalani2339]

wow loved it,

[@tayyabmaskeen6000]

Mam is this a 3_ bit serial in serial out shift register?

[@celalyahyaergun7614]

I did not understand what is the difference between serial in seriol out and serial in parallel out

[@jnsphysics2674]

Why are you taking like that Q2 Q1 Q0 from left to right...In some books that is Q0 Q1 Q2 from left to right

[@Yogesh-xy5nw]

How many stages of shift register??
A)5 stage
B) 8stage
C) no specified sequence of stage

[@Soumo_]

IMPROVE YOUR ENGLISH AND THE WAY OF YOUR PRONOUNCIATION ....

[@parthikirubha]

Why D2 = Q2,
My Sir teaches me Dn = Qn+1
How is this ....Please anyone clear my doubt in English

[@abhisanthapuri8588]

For D flipflop the next state is independent on previous state.it only depends on input at that time

[@Nani-sz8fn]

Mam but we should get the output as 110 , but you've considered the output as 011🧐, can anyone please clarify my doubt??

[@jeenashrestha9331]

Please made tutorial on PISO Register

[@sagardey2241]

thanks you tachar

[@sahinalam7532]

Mam we get the same input in q2 so why we need another bit to get in q0??

[@kavyareddy4231]

Nice✌😊

[@mohdsadeek9367]

Four flip hoge to truth table same hi rhega ya nhi

[@pavanteja2219]

mam,u could have taken any other example

[@anjali.-.]

Gud

[@kavyasharma9018]

Awsome

[@sagarika3843]

Ma'am what about parallel in serial out?

[@mahendrabirla5337]

after 5 ck pulse we get 1 at Q0 so we need 6 ck pulse to pass 3bit into SISO register

[@shivkumaryadav5741]

Mam Explain the Hindi also

[@PAuLXPlain]

Yen is Equal to LOL

[@muhsinabbas1181]

how to show it in a wave form

[@Yogesh-xy5nw]

Please give me answer as early as possible mam

[@brahmamyadav3780]

Why take n=4 bits only

[@Soumo_]

REPEATEDLY SAYING.... IMPROVE YOUR CONVERSATIONS

[@jaisuriyar5259]

why don't you use just 1 D-flipflop and get required output in just 3 clock cycles instead of using 3 D-flipflops??
like, what is the point of using 3 D-flipflops for a process that can be achieved easily with just 1 D-flipflop?
I know 3-bit register requires 3 D-flipflops, but I can see that there is only one bit is processed at one clock cycle. I'm OK with your explanation but I need a meaning for this.

[@adityacahya9563]

Please input the translate:(

[@Soumo_]

Clack pulse 😂😂😂😂😂

[@rekhasencha473]

Parallel to serial conversion ka video lec nhi hai mem

[@itsidiotsdreaminsider3663]

can i please get link of what is shift register????

[@Soumo_]

Clack pulse 😂😂😂😂

[@1533live]

Agr aap Hindi m bol lo kya bigad jyga aapka😬😬😭

[@Soumo_]

Ennn 😂😂😂😂