Mock Interview Analog Design Engineer for

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  • Опубликовано: 29 дек 2024

Комментарии • 13

  • @ankitraj4592
    @ankitraj4592 12 дней назад +5

    Hello Sir,
    The 2nd RC ckt you gave in which the initial conditions of capacitors were +1V and -1V. At t=0+ the Vo will be 1.5V and can be calculated using Qi=Qf on the capacitors and then Vo(t) = -u(-t) + (5 - 3.5*exp(-t/2RC))*u(t) and Vc1(t) = u(-t) + 3.5*exp(-t/2RC)*u(t). I also confirmed it on simulation.

  • @RamBalaji18
    @RamBalaji18 13 дней назад +4

    Good video!

  • @Abhilashee23s012
    @Abhilashee23s012 12 дней назад +3

    How the pole is at zero frequency can you explain ?For last question.

    • @AmitBar-Analog_Circuits
      @AmitBar-Analog_Circuits  12 дней назад +1

      ruclips.net/video/o0kaBseKBSw/видео.html

    • @SAhellenLily
      @SAhellenLily 12 дней назад +1

      for finite way to slove your Q 👍
      A infinite, 1/Req*Ceq=1/R*C

  • @SAhellenLily
    @SAhellenLily 13 дней назад +3

    Thanks Sir 👍
    Very interesting circuit 😊
    Guess
    [(v+-v-)*A-vout]*1/Rout=voutsCL....T.F(1) with no feedback (diff pair with active current mirror)
    Rout=ro2//ro4
    A=vo/vd=gm*Rout
    Vin=v+-v-
    🤔
    The version is so merciful to Man!
    Case1 DC gain=5,db=20(1-log2) almost 13db
    Case 2 Cap have a initial value and my vc1 discharge and vc2 - 1to 2.5 and then exponential increase charge close to 5v waveform is the same as You
    Very interesting circuit 😁

    • @RamBalaji18
      @RamBalaji18 13 дней назад +2

      22:25 Why is the capacitor impedance exponentially decreasing in frequency domain? Shouldn't it be 1/s? And due to the presence of resistor, the response is 1/(1+sRC).

    • @AmitBar-Analog_Circuits
      @AmitBar-Analog_Circuits  13 дней назад +2

      Yes Bhaiya

    • @SAhellenLily
      @SAhellenLily 13 дней назад

      Yes 👍

  • @ankittripathi8643
    @ankittripathi8643 12 дней назад +2

    Both of you solved the second question incorrectly. You guys didn't take the effect of initial condition on the capacitors into consideration. [ Vc1(0+) = 3.5V and Vc2(0+) = 1.5V ---> Assuming equal capacitances.] There should be an errata video of this instead of just letting it go, if you really want people to learn as you said in your video and not make silly mistakes like you did.

    • @AmitBar-Analog_Circuits
      @AmitBar-Analog_Circuits  12 дней назад +3

      This is the magic of this questions...not considering the initial condition at the moment of your interview ... interviewer can check/test your skill oh his/her own style...☺️