Logic Gates and the Ripple Carry Adder
HTML-код
- Опубликовано: 8 июл 2016
- This video follows on from previous videos about truth tables and Karnaugh maps. It hints at how truth tables and K-maps can be used in circuit design. It covers some well known logic gate combinations including NAND, NOT and XOR, and how logic gates can be combined to make a half adder, then a full adder and ultimately a ripple carry adder capable of multi-bit binary addition.
Explained in 10 minutes what took my professor 3 class periods. THANK YOU
so true
You made a lot of these topics easy to digest. You're a talented instructor!
I wish there were more people like you teaching at universities. I'm from the U.S. btw.
Your explanations are truly life saving , thanks!
Glad to help. :)KD
Extremely understandable series on this topic. This topic takes art to be explained and being opened up. You did just well.
You are very kind. Thank you :)KD
I have an exam covering this material and this has been a very helpful tutorial for it!!!
Glad to help. Thanks for the comment. :)KD
You explained this topic perfectly. Your great!
Excellent explanation. Thanks!
Thank you ! Great, structured explanation !
Thank you :)KD
Thank you so much! You explained it excellently.
Tnx
Excellent Explanations! Thank you very much. I really enjoyed your videos.
You are very welcome. Thanks for taking the time to comment. :) KD
Very helpful. Thank you for the video.
you are giving these informations us for free. You are an angel man.
You're welcome :)KD
To be honest thank you very much. Save my time.
You are most welcome :)KD
Your voice always makes me feel calm and confident🥰
Thank you :)KD
best clarity teaching of logic gates!
Thank you. Much appreciated :)KD
Amazing work, thanks a lot!
Thank you :)KD
20k views , 300 likes
looks like we are 300 student who are repeating the video over and over XD
good job dude, all respect
Thank you for your help.
You're welcome :) KD
you made it very useful to understand it thank you sir
Thanks for the comment :) KD
Anymore on the ripple carry adders?
I was highly shocked and got happy when I realized it was not an Indian or Hindi video. Big hugs to you
8:25 : Only either of them can produce 1 not both for any input
thank you very much for your very useful explanations, however I will have a question concerning the ripple carry adder, more precisely the diagram at 9:01: is it not a half adder which should be located at the beginning (top right level) of the ripple carry adder? the fact that at this level a full adder is no longer necessary since there is no carry in variable
Yes, you're completely right
Thanks a lot!!
You're welcome :)KD
Thanks...
Please do a video on Finite State Machine
5:10 Unfortunately this is neither elementary or high school where I live. Algebra I is all assigned and it didn't even include square roots or binary. Though the binary appears self explanatory. Still gotta learn those and line factors and some geometry stuff.
So while it may seem redundant, thank you.
Edit: NVM, just remembered I did Alg. 1 as an elective not a core class, so all I got was grade 8 pre alg.
Im so confused??..
Last video it's Z and now it's P..
And now were using another table...(1:08)
For context the last video Ive seen is the "Logic Gate Combination"
Am I in the right order??
Well explained, but isn't the first adder on the right a "half adder" because there's no carry yet? 9:17
Good point!
Sure is
normally a Full Adder is used as well with carry input 0 ( but the input is missing here )
Was confused on the same thing thx for askin
thank youu
You're welcome :)KD
Where does this C_in come? people usually don't explain it
from the previous full adder check 9:07
and the first full adder's cin is 0
5:42
i am 100% that is the voice of prof Albert R. Meyer of MIT.
Nope - it's Kevin Drumm :) KD
Para despejar las melindres a media mañana
1000th view :)
check the likes-dislikes ratio! right at the moment it is 182-likes and 1-dislike. the guy who disliked should have probably had a bad day! :)