My instructor actually includes your videos as part of the computer organization and architecture course! I love your videos. Very-well explained and amazing visual diagrams!
This so takes me back to Microprocessor Programming when I was at college in the early 1980s. It was the Motorola 6502 then. But like clockwork, as soon as I saw that hash sign I thought "immediate mode". Funny how it comes back after all these years, and I went into electronics rather than computers. I also remember "accumulator", "zero page [register]", "indirect indexed" and "indexed indirect" addressing modes.
Question! how do you know what addressing mode is being used by the opcode based on the bits ? i see that 2 bits are allocated to it but how do you know what mode it specifies? i been looking everywhere for a answer and im struggling to get one!
At 1:10 you said "Fewer bits for the operand code means that (Fewer memory locations can be accessed directly)" the part that i have written in brackets< what does it means, the term directly has always left me confusing like what is "directly"? Can you please explain that? Thanks.
Perhaps the video I uploaded yesterday about RISC and CISC will help (link below). Suppose you have an instruction which adds a value to contents of the accumulator. The operand of the instruction could be the actual value you want to add, so ADD #25 means add the number 25 to the contents of the accumulator. This is called 'immediate addressing'. If however the operand was a memory address of a location in memory that contained the value to add, this is called 'direct addressing'. So ADD 25 means the value to add can be found in location 25. When I say "fewer memory locations can be accessed directly", I mean that fewer memory locations can be accessed with direct addressing. ruclips.net/video/6Rxade2nEjk/видео.html :)KD
Excellent explanation, but one query I'm not sure about. In 6:10, you show that the value in the PC is 101, but you show the "BR +3" instruction at address 100. If that's the case, how does the PC read the instruction "BR +3" when it's at the previous address?
The program counter stores the address of the next instruction to execute, which is in 101. The instruction currently being executed is at address 100.
register direct addressing mode: if the operand is stored in a register, it is known as register direct addressing mode(FASTEST) register indirect addressing mode: if the register contains the MEMORY LOCATION of the value, it is known as register addressing mode. immediate addressing mode: when the operand of an instruction is the actual value to be operated on, it is known as immediate addressing mode direct addressing: if the operand is the memory address that contains the value to be operated on, it is known as direct addressing indirect addressing mode: if the operand is a memory address of the LOCATION that contains the memory address, it is known as indirect addressing mode(memory has to be accessed TWICE) * NOTE: accessing the memory is more time consuming than accessing registers
Questions: 1) What sort of computer might we be carrying these instructions out on? 2) WHY is register-direct addressing faster than going to the memory? Are the registers themselves not RAM in their own particular way? Or does it change things in that they are on the main processor chip? 3) What are the factors that would make you choose one particular method over the others, especially if it comes with downsides?
(Answer to 2) Basically because the ALU cannot directly connect with the memory and would need the Memory Data Register in between to do the Data Transfer.
@@ComputerScienceLessons that's absurd. Instructions and address modes are specific to each processor family. And when very similar instructions do exist, the mnemonic names and register names will differ.
Straight to the point. Trying to understand this for days. Thank you, Prof.
You're very welcome. Thanks for commenting :)KD
Same here!
My instructor actually includes your videos as part of the computer organization and architecture course! I love your videos. Very-well explained and amazing visual diagrams!
Thank you. It's great to hear how my stuff is being used. :)KD
It amazes me how clear you make the topics you explain , thank you!
Your teaching style is so consistent, to-the-point and well explained. Super impressed with your channel!
nothing to say except exeptional teaching, everything is clear and easy to understand thanks to your help my respect to you good sir
The best video so far about addressing modes. Thanks
Glad it was helpful. :)KD
This channel is most regarded than a top UK uni. Many thanks
Very kind of you to say so :)KD
Its like i am hearing some english course dialogue for my studies lol, love how u explain. new subscriber from argentina
Thank you so much i have digital microsystems design exam 3 hours from now this saved me a ton of time
Crystal clear explanation sir continue this teaching❤
Thank you. I have a series to upload about WiFi soon :)KD
Top notch explanation. I loved it.
Thank you :)KD
Your videos are really helpful. Thank you so much 💙
You're very welcome :)KD
Thank you for this amazing explanation
Excellent explanation. Thank you so very much!
You are most welcome :)KD
My deepest gratitudes. You are amazing, indeed. 🙏🌹
clearest man on earth probably.
Great video, would love a video discussing all the addressing modes of x86 processors.
He is speaking like he is reading a 📚 novel or fantasy series hahahah
This so takes me back to Microprocessor Programming when I was at college in the early 1980s. It was the Motorola 6502 then. But like clockwork, as soon as I saw that hash sign I thought "immediate mode". Funny how it comes back after all these years, and I went into electronics rather than computers. I also remember "accumulator", "zero page [register]", "indirect indexed" and "indexed indirect" addressing modes.
Funny how we still teach this today. The concepts are still the basis for most machine architectures. Roll on quantum computers!
@@ComputerScienceLessons Yes, it's amazing that so much of what I learned 35 years ago in a rapidly-evolving technical field is still relevant today.
How is this channel not bigger
One day, I hope to spend some time raising its profile. :)KD
You sir are a god among men. 🙏🙏
If only my professor was as good at explaining this as you are, smh. Keep it up :)
I will - TY :)KD
Really well presented 💯
Thank you :)KD
Question!
how do you know what addressing mode is being used by the opcode based on the bits ?
i see that 2 bits are allocated to it but how do you know what mode it specifies? i been looking everywhere for a answer and im struggling to get one!
Clear and concise. Thank you.
You're welcome :)KD
Brilliant explanations. Thanks!
Thank you. I couldn't understand indirect addressing fully until I watched this.
You are very welcome. :) KD
this man saved me
My pleasure :)KD
Thank you, clear explanation. very much interested to see more videos from Kevin Drumm
Coming up. :) Tnx for the comment.
At 1:10 you said "Fewer bits for the operand code means that (Fewer memory locations can be accessed directly)" the part that i have written in brackets< what does it means, the term directly has always left me confusing like what is "directly"? Can you please explain that? Thanks.
Perhaps the video I uploaded yesterday about RISC and CISC will help (link below). Suppose you have an instruction which adds a value to contents of the accumulator. The operand of the instruction could be the actual value you want to add, so ADD #25 means add the number 25 to the contents of the accumulator. This is called 'immediate addressing'. If however the operand was a memory address of a location in memory that contained the value to add, this is called 'direct addressing'. So ADD 25 means the value to add can be found in location 25. When I say "fewer memory locations can be accessed directly", I mean that fewer memory locations can be accessed with direct addressing.
ruclips.net/video/6Rxade2nEjk/видео.html :)KD
Brillanttly Explained. Thx!!
Thank you :)KD
Excellent explanation, but one query I'm not sure about. In 6:10, you show that the value in the PC is 101, but you show the "BR +3" instruction at address 100. If that's the case, how does the PC read the instruction "BR +3" when it's at the previous address?
The program counter stores the address of the next instruction to execute, which is in 101.
The instruction currently being executed is at address 100.
@@gnir6518 thank you!
register direct addressing mode: if the operand is stored in a register, it is known as register direct addressing mode(FASTEST)
register indirect addressing mode: if the register contains the MEMORY LOCATION of the value, it is known as register addressing mode.
immediate addressing mode: when the operand of an instruction is the actual value to be operated on, it is known as immediate addressing mode
direct addressing: if the operand is the memory address that contains the value to be operated on, it is known as direct addressing
indirect addressing mode: if the operand is a memory address of the LOCATION that contains the memory address, it is known as indirect addressing mode(memory has to be accessed TWICE)
* NOTE: accessing the memory is more time consuming than accessing registers
Thanks
That was very clear and helpful
Thank you sir.
You are welcome :)KD
awesome explanations
Thank you :)KD
You are a life saver
Glad to help :)KD
Question: how did processors like the 6502 change addressing modes if they had no space in an instruction for addressing mode?
It's helpful! Thank you!
This video helped a bunch thanks bro
You're very welcome :)KD
Watched for level one sem one exm
Again level two sem two exm❤
I wish you luck :)KD
Thank you. This was very useful.
this is brilliant
Thank you :)KD
Questions:
1) What sort of computer might we be carrying these instructions out on?
2) WHY is register-direct addressing faster than going to the memory? Are the registers themselves not RAM in their own particular way? Or does it change things in that they are on the main processor chip?
3) What are the factors that would make you choose one particular method over the others, especially if it comes with downsides?
(Answer to 2)
Basically because the ALU cannot directly connect with the memory and would need the Memory Data Register in between to do the Data Transfer.
what is the size of a memory that can be accessed using
immediate mode
How does the processor know what is data and what is an operation ?
a few bits are reserved one or two tell the processor that if the contents fetched are to be treated as an actual value or as an address value
Thank you so much, Professor. It was great. May I have your power point slides?
How is register-direct mode is faster than immediate mode?
Extremely helpful thank you!
Super sir ❤
You're very welcome :)KD
Sounds like the voice of Thomas the Tank Engine.
Wasn't that narrated by Ringo Star - from Liverpool. :)KD
@@ComputerScienceLessons Yep you sound like him
IM going to guess you are referring to the MIPS archetecture
ty mr.saint, u are the best!
Thanks ❤️❤️
where are your references please?
This is knowledge I have carried around in my head for decades! :)KD
Thank you.
Thanks 😊
You're welcome :)KD
شكرا كان ذالك مفيدا
Von Neumann or Harvard architecture portrayed here?
This is Von Neumann. I have covered Harvard in this video ruclips.net/video/4nY7mNHLrLk/видео.html :)KD
are you not accessing memory when fetching nr 100 aswell? Won't indirect access memory 3 times
thank you sir
Super super super usefull....amazing
:) KD
thx
yw :)KD
Your title fails to identify which processor you are talking about. ARM? 6502? 680X0? X86? PowerPC?
I wanted to stick with generic concepts :)KD
@@ComputerScienceLessons that's absurd. Instructions and address modes are specific to each processor family. And when very similar instructions do exist, the mnemonic names and register names will differ.
foreign jay z teaches computer architecture
thanks for the video tho helped a lot
"I believe you can speak things into existence." jay-z :)KD
❤
fantastic
Thx :) KD
lets get lost tonight
?
@@ComputerScienceLessons getting high with asm i downloaded nasm in wsl pretty cool stuff loadin some register and shit trippin bruh