Thank you for your work. I have to design a LDO after an choke input DC regulator because the input and load voltage diffrence is abaut 4Volts maximum. The input DC voltage after a choke contain only a pure 100Hz sine wave as noise, (80mV@460mA preload) insted of any ripple or high frequency noises what can came from an usual rect.+capacitor combo. The Line voltage regulation and behave at distorted line voltage is also looking realy good for me. So the LOD is only have to filter out that 100Hz sine and may keep with the load current changes. I think the PSRR is can be fair at low frequency to do that. My question is: what is the practical placement of the lower pole frequency relatively to the 100Hz noise? fpl(by RL’&CL):~10Hz fph1(by emitter follower driver transistor miller&op-amp output res.): ~460KHz fph2(by common emiter pass transistor miller @ Av & base+drive res.’s w/o. Rc ll CL): ~ 6KHz. By actual design. It is fine? The Rc ll CL i think drop the Av significantly at 6KHz, so the real fph2 may goes mutch higher than this. Like 1800KHz because the Av factor with naked Rc is close to : -300. Thanks for your time.
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Thank you for your work.
I have to design a LDO after an choke input DC regulator because the input and load voltage diffrence is abaut 4Volts maximum. The input DC voltage after a choke contain only a pure 100Hz sine wave as noise, (80mV@460mA preload) insted of any ripple or high frequency noises what can came from an usual rect.+capacitor combo. The Line voltage regulation and behave at distorted line voltage is also looking realy good for me.
So the LOD is only have to filter out that 100Hz sine and may keep with the load current changes. I think the PSRR is can be fair at low frequency to do that.
My question is: what is the practical placement of the lower pole frequency relatively to the 100Hz noise?
fpl(by RL’&CL):~10Hz
fph1(by emitter follower driver transistor miller&op-amp output res.): ~460KHz
fph2(by common emiter pass transistor miller @ Av & base+drive res.’s w/o. Rc ll CL): ~ 6KHz. By actual design.
It is fine? The Rc ll CL i think drop the Av significantly at 6KHz, so the real fph2 may goes mutch higher than this. Like 1800KHz because the Av factor with naked Rc is close to : -300.
Thanks for your time.
Very helpful. Thank you very much
thanks alot .