Tutorial 3: On-Chip Memories - Challenges, Opportunities, and Recent Advances

Tutorial 3: On-Chip Memories - Challenges, Opportunities, and Recent Advances
Speaker: Prof. Manan Suri (IIT-Delhi), Anuj Grover(IIIT-Delhi)
Tutorial Abstract:
Estimates suggest that 463 exabytes of data will be generated daily in 2025. 175 Zettabytes of data storage is expected to be used in 2025. Already, 70-80% of area in advanced digital SoCs is occupied by memory. In this tutorial, we look at challenges and opportunities related to embedded memory circuit design and non-volatile memory devices. In advanced technology nodes, SRAM cell is co-designed across Technology and Design groups. First half of the tutorial will cover challenges related to read/ write operations in a conventional 6T SRAM cell and also give an overview of assist schemes used in design to gain density and functionality. Session will provide a glimpse of advanced statistical methods used in designing SRAMs. We introduce the memory bandwidth bottleneck in data-intensive applications and present some recent work on In-Memory Compute (IMC) in SRAMs. In the second session of the tutorial we will introduce basics and working of emerging Non Volatile Memory technology such as PCM (Phase Change Memory). Further, example case-studies of computational applications of emerging NVM devices, such as neuromorphic computing and logic-in-memory, will be briefly discussed.
About Speakers:
Dr. Manan Suri leads the NVM and Neuromorphic Hardware Research group at IIT-Delhi. His research interests include Semiconductor Non-Volatile Memory (NVM) Technology and its Advanced Applications (Neuromorphic, AI, Security, Computing, Sensing). Dr. Suri has been globally recognized as a leading DeepTech Innovator. He was selected by MIT Technology Review as one of the world’s Top 35 Innovators under the age of 35 (MIT-TR 35 Global List - 2018) and Top 10 Indian Innovators under 35 (MIT-TR 35 India List - 2018). Dr. Suri received the prestigious IEEE EDS Early Career Award (2018), NASI Young Scientist Award (2017), IEI Young Engineers Award (2016), INAE Young Engineer’s Award (2021) and Laureat du Prix (2014) from the French Nanosciences Foundation. Dr. Suri has filed several patents, authored 85+ publications and successfully led several sponsored research projects as principal investigator. He has published at high impact venues such as Nature Communications, Scientific Reports, IEDM, TNNLS etc. Dr. Suri is the founder of IIT-Delhi Deeptech startup CYRAN AI Solutions which has developed multiple innovative technology products and solutions. He also serves as an advisor to leading AI/NVM Hardware companies and government bodies. In past, he has worked at NXP Semiconductors, Belgium as Senior Scientist and CEA-LETI, France. Dr. Suri received his PhD from INP-Grenoble, France and Masters/Bachelors from Cornell University, USA.
Dr. Anuj Grover is Associate Dean - IRD and Associate Professor in the Department of Electronics and Communication Engineering at Indraprastha Institute of Information Technology Delhi (IIIT Delhi). He also chairs the Institute Innovation Council and is a Level-3 Certified TRIZ Practitioner and frugal innovation enthusiast. Prior to joining IIIT Delhi in February 2019, Anuj worked at STMicroelectronics, India for about 18 years in different roles in the Embedded Memory Design team. Over the years he has led large teams on multi-million dollar projects. He has over 40 publications in peer-reviewed journals and conferences, 6 granted patents, and more than 10 invention disclosures in different stages of filing and grant. His main areas of research include low-power digital circuits and systems, embedded memory design, and reliable circuit design.