Sequence Detector | How to Design a Finite State Machine ? Step By Step Guide with Examples
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- Опубликовано: 30 июл 2024
- This video explains the step by step design of the Finite State Machine (FSM). The procedure of designing the Mealy type FSM is explained by the example of 1001 Sequence Detector.
In this video, the design of both Overlapping and Non-overlapping Sequence Detector is explained along with the Simulation of the Designed Circuits.
You can download the notes for this video using the following link:
bit.ly/46vh8UI
The link for the other useful videos related to Finite State Machine:
1) What is Finite State Machine ? Mealy and Moore Machine Explained.
• Finite State Machine E...
2) How to Draw a State Transition Diagram | Analysis of Clocked Sequential Circuits
• How to Draw a State Tr...
3) State Reduction and State Assignment in the State Diagram
• Finite State Machine :...
4) Sequential Circuits (Playlist):
• Sequential Circuits
The steps of designing the Finite State Machine :
1) Define the purpose of the Machine in simple words or in form of Block Diagram. Define the inputs and outputs of the FSM. It should be realizable using finite number of memory elements.
2) Draw a State Transition Diagram
3) Draw a State Table
4) Remove the redundant states from the state table
5) Select the Type of Flip-Flop (D, T, JK or SR) and draw the excitation table
6) Find the Boolean Function for each flip-flop in terms of state variables and inputs.
In a same manner, also fine the output Boolean Function.
7) Draw and Implement the Logic Circuit.
Chapters:
0:00 Steps for Designing the Finite State Machine
2:00 Overlapping vs Non-Overlapping Sequence Detector
5:09 Design of 1001 Overlapping Sequence Detector (Mealy Machine)
16:16 Design of 1001 Non-Overlapping Sequence Detector
21:36 Simulation of the Designed Circuits
This video will be helpful to all the students of science and engineering in learning, how to design the Finite State Machine and how to design the Overlapping and Non-Overlapping sequence detector.
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You can download the notes (PDF) for this video using the following link:
bit.ly/46vh8UI
For more videos on Sequential Circuits, check this playlist:
bit.ly/43SvUmj
Best teacher on earth!!This guy is a genius !!!
Tried implementing the same in verilog.... woah, loved it
Best explanation 👌🏻👌🏻👍🏻👏🏻
Fratello io ti amo, grazie per il video e se passerò l'esame sarà anche merito tuo❤
The best teacher in the world
thank you so much!!! 🙏
Great Video Actually !!!!!!!!!!!!!!
hello sire, how to know what to put in the preset and clear of the flip flops in the simulator?
Generally, the preset and clear inputs of the flip-flop are active low. Meaning that when 0 is applied as an input then it will get activated. So, when we want to clear the flip-flops then we should make clear input 0. And we want to make them inactive, we should apply 1. This is valid, considering the inputs are active low. If they are active high, then you need to do other way around. I hope, it will clear your doubt.
@@ALLABOUTELECTRONICS thank u very much, indeed cleared my doubt 🙌
Indeed, thank u very much@@ALLABOUTELECTRONICS
Very good
You are an absolute legend.
Also I want to ask,what would we do if we were to use a JK flip flop for the implementation. How do we figure out how many flip flops to use?
hi, I tried following all the steps for another string but If I try to simulate the circuit It never gives output 1...any chances I can contact you somewhere to share my work?
Perhaps, you might have made some error during the design steps. You may contact me via mail.
Thanks for explaining these concepts in great detail.
Question :- Is the sequence generator made with the FSM different from the one with the shift registor?
Yes both are different one.
Great tutorship 🙏
Sir, which software are you using for simulation?
Deeds circuit simulator.
@@ALLABOUTELECTRONICS Is it open source software
Actually I have one question related to fsm can u give the solution for the question
The solution is the Y output.
Which simulator is this?
Deeds circuit simulator
How did you determine the Q1+ and Q0+ ???????
It is written from the state table. For example, when x=0 and present state is 00 then next state is also 00. ( see the left table). According to that, in the second table ( right one), the Q1+ and Q0+ is 00. Similarly when x=1, then next state is 01. So in the second table in the fifth row Q1+ and Q0+ are 0 and 1 respectively. I hope, it will clear your doubt.
What is application used for simulation?
Deeds circuit simulator
Which s/w you design and simulator
Deeds circuit simulator
If the number to detect is not 1001, but 0101, can I set A, B, C, D to -, 1, 10, 100 like the video?
Or should I set B, C, and D to 0, 01, 010?
@@user-oj1si7ji2n Yes, you should set the states like this only. (B = 0, C = 01 and D = 010)
@@ALLABOUTELECTRONICS Then, how should I set it up when I make one circuit that outputs 1 when 0101 or 1001 is an input?
which sequence you want to detect? 0101 or 1001.
@@ALLABOUTELECTRONICS I'll write the question I'm trying to solve. "The circuit examines groups of four consecutive inputs and produces an output Z=1 if the input sequence 0101 or 1001 occurs. The circuit resets after four inputs. Find the Mealy state graph."
Kal kiska paper hai
DLD ka?
🙏🙏
The best teacher in the world