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Tang Nano 20K vs Tang Nano 9K FPGA Board
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- Опубликовано: 17 авг 2024
- This video highlights the differences between the Tang Nano 20K FPGA development board and the Tang Nano 9K. Both boards are inexpensive development boards that can be used on breadboards for experiments and learning. I use the development tools from Gowin.
Chapters:
0:00 Intro
0:27 FPGA differences
1:31 Board differences
3:13 Clock control
5:45 Pins and pinout
7:37 PicoRV32
9:32 Resources and timing
Links
github for PicoRV32 mini-SoC for Tang Nano 20:
github.com/gru...
Videos
Getting started with Tang Nano 9K: • Getting started with t...
PicoRV32 on Tang Nano 9K: • Tang Nano 9K Simple Pi...
Inferred SRAM for PicoRV32: • Tango Nano 9K PicoRV32...
WS2812B RGB LEDs: • WS2812B Addressable RG...
Great how explain things. I'm just starting with the 20k & watching your videos helps alot. Please keep it up.
Thank you, again for the content provided.
I am happy that you find it useful. Thanks!
Thanks a lot for sharing!
For someone beginning with FPGA's, would you recommend VHDL or verilog. I'm an embedded 'C' engineer, if that helps the choice :)
My background is probably similar to yours. I don't know VHDL. I started with Verilog because of its C-like syntax. If you know C but also understand how clocks work with flip-flips, getting started with Verilog is quite easy, and its module concept works well. I think it is also less verbose than VHDL. But I find things not to like about Verilog. One is that it is not strongly typed. This can lead to errors. Another is that the "wire" vs "reg" definition is pretty weak from a language design point of view. But I think I will stick with Verilog out of inertia.
Verilog on a cheap FPGA board can be fun for software folks (like us) who have worked close to the hardware. Cheers.
Verilog puts you on the pipeline to SystemVerilog and SystemC so definitely go verilog.
I first learned VHDL and let me tell you, it is awful and has a strict syntax and design in the worst ways. The type system is awful.
@@mattymerr701 When I worked in the defence industry it VHDL was the standard to use. However as an embedded C programmer, I'll take the verilog recommendations, thanks both!
Rust gains traction as it fails compile time, which is better - I see vhdl as the more safe variant. I did however start with verilog, but now i just use whatever is used already :-)
Unless you're doing DSP and math heavy twos compliment /signed and unsigned arithmetic, there's no advantage to VHDL versus Verilog these days.
It is more verbose and while 'safe' it looks similar to ADA syntax wise.
If you're already comfortable with C , then Verilog will make a bit more sense.
Thx for sharing!
Thank you for the video. Can this Tang Nano 20k generate sine waves at HF (20 meter) frequencies ? Just in case I want to build a well filtered beacon...just in case.
The FPGA on the Tang Nano 20K (and the 9K) is a digital only device so its output pins are either high or low-- so it can produce square waves but not (directly) sine waves. If all you want is a square wave clock generator, check out a part called si5351. John Hawkes made a youtube video about using one of these as an LO sine wave generator by filtering its output. The video is called "SI5351 Clock Gen as Radio Local Oscillator in Old Radios".
@@electronics.tinker Thank you for your reply. I check out Hawkes video. I put a low pass filter into the output from the Si5351a and that knocked everything down a bit. However, the signal was knocked down below 0 db. So now I think I have to
amplify and filter the results of the amplifier as well. ... So it goes.