der8auer: Man, your videos have an insane quality... Continue like that, push that silicon to it's limit. You're a boss, mate. Herzlichen Grüssen von der Schweiz :)
Thank you for again exposing straight up marketing lies.. confused why they refuse to just own up to it. Legal issues, maybe? Scared ppl might find out it all depends on what should be put where to "power" and unlock all cores?
Im really sure in the next bios update you can put a 32 core threadripper, or just put a 32 core epyc . We just dont know when it will comes . Plus , amd need a counter for i9 7980XE with its 18 core .
Can You kindly, recommend ASUS to release a high end Workstation motherboard for Threadripper and one for Epyc designed to support each 6GPU please PCIE 4.0, for many that work with CG that have been waiting for this for years and dont want to buy into intel dual socket again.....and I wanted to ask, if an EPYC CPU works on a regular Threadripper motherboard?!
I 100% agree and I called it last year. AMD will release a 32-core TR CPU. Awesome work as usual with this video. The dummy core theory made no sense and still makes no sense ;)
Threadripper is basically a way to use partially working 8-core Ryzen parts in a product that is geared towards both clock speed and core count. EPYC is setup for core count/IO lane heavy applications. The 32-core ThreadRipper doesn't make sense from that perspective. Smart move on AMD's part of finding a while to use some otherwise less useful bins of their processors.
I agree with Knirin on this one. A 16-core threadripper with a high clockcount makes sense... however I don't expect a 32-core threadripper to make much sense. It won't be able to clock as high, making it a non-option for 'gamers' (granted threadripper itself doesn't make much sense for gamers that don't also do content creation or other heavy workloads). If it won't be able to clock as high as current threadrippers, what would be the point in a 32-core threadripper over a 32-core epyc? The only difference there would be PCI-lanes, cache and ECC-R support (and possibly price). Granted, it sounds like something Intel would do given their trackrecord of crippling consumer-grade CPU's to boost/force Xeon sales but AMD?... I dunno. Maybe it works from a wafer-loss reduction standpoint i.e. a core with everything working except the cache/PCI-E controller can't be used in Eypc but can be used in 32-core threadripper giving it more value than simply being used as a 'dummy'/'spacer' core) but that's just unfounded speculation on my part ofc as without a usecase or consumerbase to buy the things it doesn't give AMD much added value aside from being able to say their fastest 'prosumer' CPU beats Intel's by an even bigger price/performance margin than it currently already does. :)
They may have designed it to allow for easy release of a 32 core TR but that does not mean that it will actually get released. It may have been just a contingency plan in case intel decided to add many more cores to enterprise products in the near term.
@@der8auerAll over the way it says EPYC has SoC (system on a chip), and no where is saying that Threadripper has it... This doesn't make sense considering how similar they are in your analysis... Also, SoC is very interesting - I like how the controller is contained in the chip instead of the motherboard (this is how it should be for all of the CPUs, I think).
I think the lower infiniband interconnects wouldn't make this possible, and/or with the higher clock speeds, the excess heat would be too much. Even with two dies active they already recommend water cooling and high end cooling solutions only. More dies and cores would mean you would need phase change cooling, especially at any higher clock speeds.
Are 20 and 28 cores possible? I thought there had to be an equal number of cores active for each die. Epyc jumps from 16 to 24 to 32, there are no 20 or 28 core Epyc CPU's afaik?
Individual cores in each die might not be working so well so they may be disabled. So likely to be matched with dies of equal core counts and since there are 4 dies per cpu core counts will likely be divisible by 4.
It seems like all active dies must have an equal amount of active cores, and both CCX's in each die must also have an equal amount of active cores. And there has to be an even number of active dies (so 2 or 4, or just the single die in the case of Ryzen). A 20 core Threadripper or Epyc would need to have either a configuration of 6+6+4+4 or 8+8+2+2, and I don't think that's possible (that the architecture or infinity fabric or w/e can't work like that). For the same reason, there is no 10 or 14 core Threadripper. Or I could be completely wrong, and they can run whatever configuration they want, and it's just a coincidence that all Ryzen/Threadripper/Epyc CPU's have core configurations that fit this pattern :D
As you said, i also believe there might be a 32C ThreadRipper for the foreseeable future. As a 1950X owner i can only be excited for what's coming to improve this Workstation. KeyShot and V-Ray would 100% surely love all those Cores. Very interesting video as always der8auer! Great findings!
Cristiano Siqueira you will not be able to hold EPYC's clocks on modified Threadripper. Plus you will need some monster cooler to cool EPYC cuz under significant load like AVX instructions cpu can go up to 300-350W.
I think it is definitely not too bad to be honest. While Overclocked, the current 1950X can already consume up to 300W when Overclocked, the Intel Counterparts a whopping 500-600W. I believe it would still be doable for those on a Custom Loop with not many issues.
yeah, interesting balance between the number of cors vs core clocks to stay in the watt budget of the platform, and the watt budget is limited by the cooler and the VRM. A 32c TR would be cool to see, tho I have doubts if it would be that much better due to the need to lower the clocks to stay within the platform's watt budget. Yes, the VRM can be modified, and Ln2 cooling can work for short periods of time. Many that use servers and workstations are unwilling to violate the service plan for there hardware, making VRM mods a non-option. And it is incredibly expensive and difficult to make a room of servers or a workstation run 24/7 with 99.999% uptime on Ln2, especially when "Failure Is Not An Option", lol.
That's not possible I think. Threadripper motherboars only have power and RAM paths to the 2 dies. The other 2 dies don't have paths from the motherboard. At lease the memory can be used through the infinity fabric but that's going to be a huge bottleneck...and power would be ridiculous if they actually have traces on the motherboard to the other dies too.
how does he not have more subscribers??! seriously my favorite channel. so much information and no unnecessary filler. Thank you so much for your hard work and videos, the effort and craftsmanship definitely shows
Dave Williams Not really, never found anything interesting in overclocking channels up to this vid. This dude clearly does way more than simply changing clocks in the bios xd. Think he just has some negative pr around him but that will solve itself if he keeps this up.
I think those x-rays also show which dies are actually active in TR. In the TR single die pics named OL and UR are fewer vias underneath the dies than in pics UL and OR. My guess is those are the 'missing' memory channels and pcie lines from the 2 inactive chips. In EPYC every die has all the vias in place.
AMD has been very smart with the release of it's ryzen CPUs, interesting to see where things will go. My pipe dream would be a TR-4 based APU with vega and HBM on board, maybe two zeppelin dies, a vega die, and HBM2/3 connected with infinity fabric. Haven't put more than a few seconds into the viability or reason why this should exist beyond being very small, but I love the thought
I had the same thought, however it would only likely be 1 die or 8-core/16-thread max because of power draw. 180w for 2 cores. The one advantage that Intel really has is a much lower power draw per performance. Which is likely the only reason the two paired. AMD just developed better power to wattage GPU while Intel the better power to wattage CPU. Otherwise I doubt they would have collaborated together on this.
holmd90 X399 is a prosumer platform. APUs are budget options. If you buy into X399, you are sort of expected to buy a beastly graphics card or even 2 (64 PCIe lanes).
Not likely to happen, even with Navi. The extra manufacturing overhead of doing all of that, all of the time and money it takes, wouldn't be worth it when the audience you're targeting is spending $500+ on a CPU. At that point you'd expect them to have enough money even for the most basic of graphics cards.
I don't share your conclusion. Threadripper is a low volume product and they probably just did it this way to reuse some of the tools involved in making Epyc and saving costs. You don't have to design a completely new PCB or replace any dies with glue. I'm sure the dies are defective and albeit connected to the substrate, there won't be any traces going to these pins at the socket. I also doubt we will see a 32 core with weird configs like you described. Having only 2 dies connected to 2 channels each would lead to (even more) asymmetric latency. And only 4 channels in general is just not enough bandwidth. I mean there's a reason why Epyc is 8 channels. And the people that demand 32 cores, but then don't want guaranteed ECC support and other Epyc features, you can count on one hand. The X-Ray images are super interesting. Thanks for sharing!
I think they could move the threadripper dies to an epyc substrate, however I think the limiting factor is more or less heat. 2 active dies on threadripper are running at high clocks than on epyc. I think it is a one or the other scenario. More cores or faster cores, but having both would likely be too much for any cooling system other than phase change.
J0k3r every single mem channel can be handled by single die but that would change the pinout meaning a new motherboard so yeah, 32c tr is possible but can require new motherboard design/chipset even the socket stay the same
+Tuna Yücer I don't even think you would need a different socket or mainboard if you keep it 4 channels. You would just need a different substrate to connect the dies differently to the already existing channels. But you will still only have half the bandwidth.
Some dies are set up for multiple memory configurations with boards. Other server cpus have worked on consumer boards this way. Some even support multiple memory types such as DDR2/DDR3 or DDR3/DDR4. So memory config may not be a limiting factor.
"I borrowed by delidding tool to Linus Tech Tips..." ...and the bastard hasn't returned it yet and I believe he will never will. That's what he wanted to say. :D
Every single point mentioned in the video is exactly what I expected from the beginning. From a production line setup/operation, development and manufacturing cost point this is the most logical and cost effective way.
love your work and dedication . Hope to see more of your great work in 2018. also loved your Lian Li PC-011 case. great design with a balance of FORM and FUNCTION.
Much cheaper and quicker to just disable dies, especially in AMD's position, than it is to setup fabs to create many different types of sockets, infinity fabrics, and this and that. When it costs them ~$20 for a single die, with a total package cost of ~$100, they're still making lots of profit with the Threadripper's. Also, as you speculate, it leaves them with lots of future expansion options.
Very interesting. But if you look more, two diagonal cores in Threadripper (upper left and lower right) have less conecctions to the substrate, and also in the the upper and down area (totally free of vials on Epic), there are two gropus of them cutting that part in Threadripper. For the way that all the dies looks interconected with Infinite Fabric, you can't go for one way to the another with only two cores, you always need to go over three of them at least, so my theory is that the other cores are there for an interconection purpouse. Those dummy dies could have all the cores, cache and pci lines disabled, but still could've the i/o part working. That way they can use bad dies, maybe not completely dead, probably just chips discarded because they use too much energy when full operational (like most CPU with less cores, its not because they are broken, but because they exceed their TDP when fully enabled, that why most old Athlon and Phenom with cores disabled can be enabled, if you can manage the extra heat).
I always figured that they used dies that couldn't reach any of the advertised clock-speeds for their products for the dummy dies so that they could keep all of the infinity fabric connections to minimize latency when the two good cores needed to transfer data across dies. It isn't like they could do anything else with their worst yields.
Great video! Another way to be 100% sure whether all 4 dies on the TR are electrically connected or not, you could simply fit the delidded TR on a PC and power it for a few seconds. Then you could check their temps using a cheap IR thermometer. Do you think they would have been blown immediately?
TR seems like it would be such a small percent of sales, even if they were using dead dies, yield rate wouldn't be changed that much. They already have high yield, but you could take the dead dies and call them good, increasing yield rate, or you use the dies after you've already declared them dead, which wouldn't change the yield rate. Not sure if this is what you're referring to with "faking" the yield rate.
Did you not notice that 2 dies on the threadripper are missing like 30-50% of the pins from the CPU to the sub strait, basically exactly what was stated.
All of this reverse engineering including microscopic X-rays, simply amazing work Roman, thanks for sharing! I only hope you checked with AMD, and they won't hold it against you :D Fascinating findings and looking forward to those higher core count threadrippers!
wwwooooowww this video is awesome i'm really impressed with the level of detail and the time spent of research, and you explain all with too much details, and i loved that...
I'd assume that the S32200 and D32188 are model numbers for the dyes. If the letter is different for various processors then it could indicate the processor model while the number indicates the model line, hence why I'm taking it into consideration along with the number code.
ouch. You took one for the team here. That is a lot of money to spend to discover the truth. I'm thankful not just to you, but your patrons who made this possible. I just found you after seeing you have a conversation with Steve at Gamers Nexus from CES2018. This was a great analysis.
The mechanical support argument makes sense since they don't have to have two different production lines, one for threadripper and one for epyc. This way they have only one line, same tooling, same processes etc. I would say that the two additional dies might be scrapped ones and indeed not mechanically connected. Having 4 active dies with varying core counts would complexify the cache and memory management and threadripper performance would vary widely from one threadripper cpu to the next.
Hmmmm... what if the difference between those go beyond firmware? My guess on that will be that the missing caps might be somehow shutting down failed dies, maybe TR CPUs start as an EPYC, and if there's a defect in the PCIe or memory controller area, those dies will probably be deemed as those alledged "dummy" dies. I believe that it is possible that AMD may eventually release a 32-core TR CPU, but maybe not because they did really plan it, but rather because they might be actually wasting otherwise viable cores. They might still need to figure out how to disable PCIe and/or MC on those defectice dies while still be able to use the cores.
César Morgan Don't forget the option of partially failed dies, like the fabled 3-core Intel chips that were rumored to be 4-core chips with a failed core, or the extremely famous 4.77MHz 8088 chips that were failed 6MHz parts sold cheaply to IBM.
@der8auer - Thank you for your efforts and expense but *that's a terrible X-Ray* 11:50 - try CreativeElectron. Along with better imaging software they make their own machines. They can slice out an image at any depth or angle, no squinting at poor contrast/fuzzy low resolution photos. Even NASA sends their stuff there ... YT, Rob
Your option 3 is likely as it’s been done in the past where the sell the ones with the defective cores while stockpiling the next versions to be released. It’s not even an indication of yield as they could have a high yield in the stockpile being held back.
This is very interesting and thank you for the video. I think it will be much easier to find if AMD have dummy dies or defective dies on board using an infra red / thermal camera. If not all dies are active the heat distribution will be different and you do not need to go over the whole process of opening the cpu cover. Some comments indicated that some of the dies might be defective and so the configuration of the cpu might change accordingly. It is possible, but I'm not sure about this point since you will need to have some tests before placing the dies on the board. If one die is defective in a way of shorting the circuit it might born all the other dies. It is hard to know how things are connected without the design layout or schematics. I'm not sure if you can map the pcb connection by measuring the resistance between all the pcb connection. It will be time consuming work. If there are defective dies on board it will be nice to see the different between 1900x, 1920x, and 1950x cpu heat distribution.
Perhaps TR is a binned EPYC bound to a different PCB so there is no cross-compatibility? That would explain why there are four transistor-laden dies in TR and would also make sense from an economic standpoint.
So looking at the xray shots, it looks like that on the threadripper dies, the dummy dies have fewer electrical connections than the functional dies while the EPYC dies all have the same distribution of connections through out all four dies.
or ... perhaps sometimes they can pull the cores they need off of all four. That is, all four are defective in some way but they are able to select-out the number of cores they need from it. Probably a silly idea but... -Matt
Yields could be very very low on 8-core chips (threadripper guarantees 200Mhz XFR boost atop 4.0 Ghz unlike 1800x which is only 100 Mhz XFR boost atop 4.0Ghz) so they might use 2, 4, and 6-core chips (4x of the chips) in a threadripper. After all, and at that level of performance, very few chips probably pass production yield testing on all 8 cores. Or it could be that the switching fabric and/or 128 PCI drivers is distributed across all 4 chips. And so when you have 2 working chips, you still need all 4 chips to complete the switching fabric and or 128 PCI lines, without leaving any holes. This way, they just design a 1-cpu config and a 4-cpu config and they are done, with only 2 manufacturing setups.
Thanks a lot for the video. It was really interesting. What happened to these processors finally? are they still working after scalp? I will wait for another video where you start both of them!
''Bined'' cores are the ones that failed is my guess aswell. As you can combo core pairs to make maximal use of the material they are made on (of, not sure what the name of it is hehe)
I was thinking that maybe all 4 chips "work" and are electrically connected but during the testing phase only a few of the cores is stable on a die so they just enable the best ones to make a complete Threadripper and disable the crappy ones in microcode. But unlike past CPUs that you could "unlock", they kill the connections to the CPU controller to unlock cores.
Well lets see if you can awaken those extra dies, however I suspect that the missing pins and such. They might be dead or not fully functioning. It is kinda expensive to redesign a whole substraight, we can see they only made minor changes between, it might have been cheaper to not redesign the package and just use dead dies for support, it would probably save them money versus designing a whole CPU package as complicated as threadripper.
at 11:25 you mention the 32200 and 32188 code, but left from those there's a "S" for threadripper, and "D" on Epyc, It could mean if the processor is made for 1 (Single), 2(Double) processor configuration. Supermicro Boards code use those letters to distinguish 1 or 2 CPU config. If you happen to have, or have had a 7351P, 7401P, 7551P I guess you'd also have the "S" marking on them, and probably the 32188 code (could be a variant, since they are a rare model of Epyc cpus).
Well I think your reason for the extra cpu dies is not impossible, just I think there is a more likely explanation. Like you said some dies do not pass, it may be faster to just sort them, use a similar substrate in both threadripper and epyc, same layout but slight variants in the configuration of the substrate mainly the infiniband interconnects it is just that threadripper has the same interconnects as the epyc substrate, but the epyc substrate just has more added to support extra pci lanes, extra memory channels, and improved machine learning. But if you were able to look at the wafers on both threadripper and epyc I bet they are identical. They come from the same wafer. Plus you also hinted at part of why they are the same as well. Threadripper have a high clock, which means more heat. So either it came down to threadripper needing a larger substrate and surface area to get rid of that excess heat and a smaller substrate was not working. OR by keeping them as close to each other as possible in design they were able to use the same manufacturing setup with as few changes to each die configuration as possible ultimately saving them in manufacturing costs. Or a combination of both.
I wonder if those capacitors were added to TR that exist on Epyc, whether it would do anything, and whether the dies became active.. It wouldn't matter in my opinion, because these dies are likely so bad they're unusable. I do, however agree with derBauer on there being plans for a 32 core CPU, when there is another chipset / board available to use the 128 PCIe lanes and additional memory lanes. My guess is it will be around a year, likely around the time Zen2 (not Zen+) is nearing.
'No path to operation', that could mean 'electrically connected', but disconnected 'somehow'. They could easily make minor electrical changes and micro code changes, that would make a microcode update 'impossible' to enable all cores. Like having a vasectomy and being neutered are two different operations, with the same end result. Well, actually in a vasectomy, you get to keep your 'rocks'. And yes, I know some vasectomies are reversible, but are some CPUs, there's the rub. ;-) Oh, has anyone done a FLIR analysis, to see if the 'rocks' are emitting heat?
Is it possible that the little 8dotted passives around the outside on top and in the middle on the bottom turn cores on and off and they sort their dies so that the there are at least 4 usable cores on each die for the 16core TR and only 2 cores/die for the 8core TR? Also consider that the higher clock rates would determine that not all cores on a single die could run at around 4GHz because of heat dissipation needs, and all of them might not test that high either. I"m suggesting a sort of binning of cores where the better ones are enabled. It would be interesting to survey the top and bottom passive positions between TR models and even between the same models, but having to delid to see the passives on the top would get expensive.
that second theory you mentioned was true on Phenom CPUs; there were certain motherboards (mainly from Asrock) that let you enable the "faulty" cores, maybe they're just repeating this method. I'm certain you're aware of this so I'm just saying that it is possible
I belive its more expensive in tooling to develop/produce a 3rd. Socket insted of using Epyc socket and use 2 already bad Cores to make it mechanically stable for heatspreder mounting.(why make something when U can use the garbage thats already made with perfekt size?) take into account how many (few) Threadripper they are selling relative to the Rysen 3,5,7. All they need to do is changing substrate. Your other solution will cost more in R&D, tooling and pure square meters in production center.
32Core TR will probably be on 7nm. We'll just have to see if they actually launch the 64Core monster Epyc this summer. If yes then most likely we'll be seeing higher core count TRs, the only thing preventing them to launch higher TRs is interference with the Epyc line-up. The only issue is: Who will buy such monsters for non-server class use in the next 5 years?
Why not make another delidding device with a blade holder instead of a pusher block? This would maintain a more precise height and angle to perhaps avoid damaging the board. At the very least it would keep your fingers out of the way.
My thought was that those two dummy dies were Ryzen dies that failed QA but were good enough to support an interconnect. The idea of finding a use for parts which would otherwise be trashed appeals to me, especially if the result is a cool product like TR.
I thought we were talking threadripper not Epyc. Sure Epyc 7601 is $4k, but threadripper 1950x is ~$950, I wouldn't be shocked to see Threadripper next bring a 32 core monster, and given the comparisons (Epyc 7401 (24core) is about $1200) I wouldn't be shocked to see a TR at that (32) scale coming in under $3000 just to bite intel. Now, would it cannibalize Epyc? probably for certain border cases, but overall I think it would be a win for AMD.
it would be interesting to see a thread ripper using the area occupied by those two extra dies for a huge amount of L4 cache.... i wonder what performance gains would be.
But der8bauer, using the Infinity Fabric for memory access and PCIe access with severely degrade performance as now 2 memory controllers have to cope with requests from 4 dies. And 2 PCIe controllers have to cope with requests from 4 dies. Also, the latency would be a serious issue. Not saying it's not possible (I would be happy if they showed Intel up), but no likely IMO.
mr. derbauer the link provided for the pics is not working. and by the way the Xray pic of CPU is just mindblowing. what i am seeing from the previous video that all the dies had transistors and if by somehow placing some SMD capacitor, is it possible to get the other cores working? also i guess if there are no physical connection like pcb traces then yeah they are useless cores in the big TR4 socket/ PCB. also now amd moved to 7 nm then i think in that space they could put 8 of the chiplets and that could possibly lead to a 64 core 128 thread CPU. which is just awesome to see delidded by you and may need some engineering witchcraft , who knows. have a nice day.
Nice video, lots of great info. Does the Eypc CPU work on a X399 board? If yes, does all Cores, PCI-E lanes and memory channels work? To those who ask “why test this”, it’s just a matter of curiosity. I mean, why the heck not?
When chips are made they inevitably have defects, however, if the chip has multiple cores, the defect may only affect some of the cores on the chip, leaving the rest operational. It makes perfect sense to disable defective parts of the chip and use the rest. Chip with 2 faulty cores becomes two core instead of four and joins the rest of the package. The entire package is comprised of chips with varying performance and they are matched to produce the final result in line with the expected performance of the end product. There is nothing bad about the practice and all chip makers do this, the reason it is under wraps is that people do not want to buy chips that have dead cores in them - even though those dead cores have no effect on the performance. It's a perception problem. Companies do not make lower capacity chips, they make one chip and when parts of it are faulty it becomes lower tier product. ie 12 core 8 core etc. Or it runs at a lower frequency. I do not get why this is even a thing
I think that option 2 is not really unreasonable. They would need some structural support under the IHS to prevent any uneven flexing when under pressure from various coolers, etc., so why waste money on getting new pieces for support when you can just take dies that failed in manufacturing? The PCB tracing could be there without the dies actually being connected; if I got everything correct, the traces look like the ones on the Epyc chip, so they might share large parts of the manufacturing process. It would be way cheaper for them to have two series of processors aimed for different markets share as much of the manufacturing as possible, with the differences being what actually makes all dies work (on Epyc) and also so that it wouldn't be possible to use an Epyc in a Threadripper mobo (although I don't know anything about the possibilities of that). To me, this sounds like the most effective way of spending you money; cut your losses and have large manufacturing overlap between two products for very different market segments - instant profit!
Well there are things like dummy dies . They help with uniformity of heat expansion. If they had to try to design a place holder for stress then it could change the whole design from thermal design points of view. Time is money and if it works then n why frack with it. My theory
Back in the days i remember the pencil mods of AMD CPUs, I'm wondering if you tried hacking the TR to unlock the other 2 dies. Things were quite simpler back then.
RE: the comments @2:30: have you ever heard of binning? They use one design w/32 cores and disable imperfect cores, and sell it as a lower model, because less of the dies are functional.
Awesome video!! I'm wondering what would happen if the SMD components were transferred though? There must be a reason why different CPUs have different locations populated. Nvidia do similar things with resistors to ID graphics cards - on some models, transferring resistors from one location to another makes nvidia's drivers ID the card as a geforce, a quadro, a GRID or a TESLA. I remember back in the Athlon XP days, there were lands on the top of the chip that could be bridged or cut to get the chip to ID as another model..
the code may be for the layout of the caps. everything looks identical except for the code the dots and the caps. not saying anyone would but maybe changing the cap layout could change the "cpu" making it epyc or 1920x or whatever. probably not very useful because they disable the cores for a reason right?
Special thanks to my Patreon supporters. Videos like this would not be possible without you guys :)
der8auer: Man, your videos have an insane quality... Continue like that, push that silicon to it's limit. You're a boss, mate. Herzlichen Grüssen von der Schweiz :)
Thank you for again exposing straight up marketing lies.. confused why they refuse to just own up to it. Legal issues, maybe? Scared ppl might find out it all depends on what should be put where to "power" and unlock all cores?
Im really sure in the next bios update you can put a 32 core threadripper, or just put a 32 core epyc . We just dont know when it will comes . Plus , amd need a counter for i9 7980XE with its 18 core .
Can You kindly, recommend ASUS to release a high end Workstation motherboard for Threadripper and one for Epyc designed to support each 6GPU please PCIE 4.0, for many that work with CG that have been waiting for this for years and dont want to buy into intel dual socket again.....and I wanted to ask, if an EPYC CPU works on a regular Threadripper motherboard?!
Just a fun test, Have you tested a TR in Epyc motherboard and vice versa?
what's the worst that can happen ? :)
I 100% agree and I called it last year. AMD will release a 32-core TR CPU. Awesome work as usual with this video. The dummy core theory made no sense and still makes no sense ;)
Thanks man appreciate that :)
Threadripper is basically a way to use partially working 8-core Ryzen parts in a product that is geared towards both clock speed and core count. EPYC is setup for core count/IO lane heavy applications. The 32-core ThreadRipper doesn't make sense from that perspective. Smart move on AMD's part of finding a while to use some otherwise less useful bins of their processors.
I agree with Knirin on this one.
A 16-core threadripper with a high clockcount makes sense... however I don't expect a 32-core threadripper to make much sense. It won't be able to clock as high, making it a non-option for 'gamers' (granted threadripper itself doesn't make much sense for gamers that don't also do content creation or other heavy workloads).
If it won't be able to clock as high as current threadrippers, what would be the point in a 32-core threadripper over a 32-core epyc? The only difference there would be PCI-lanes, cache and ECC-R support (and possibly price).
Granted, it sounds like something Intel would do given their trackrecord of crippling consumer-grade CPU's to boost/force Xeon sales but AMD?... I dunno. Maybe it works from a wafer-loss reduction standpoint i.e. a core with everything working except the cache/PCI-E controller can't be used in Eypc but can be used in 32-core threadripper giving it more value than simply being used as a 'dummy'/'spacer' core) but that's just unfounded speculation on my part ofc as without a usecase or consumerbase to buy the things it doesn't give AMD much added value aside from being able to say their fastest 'prosumer' CPU beats Intel's by an even bigger price/performance margin than it currently already does. :)
They may have designed it to allow for easy release of a 32 core TR but that does not mean that it will actually get released. It may have been just a contingency plan in case intel decided to add many more cores to enterprise products in the near term.
you here. nice
Your hair did not move once through out this video! Solid work
Loreal Paris ftw mate
Lolz
lego hair
stabilized
@@der8auerAll over the way it says EPYC has SoC (system on a chip), and no where is saying that Threadripper has it... This doesn't make sense considering how similar they are in your analysis... Also, SoC is very interesting - I like how the controller is contained in the chip instead of the motherboard (this is how it should be for all of the CPUs, I think).
Hated by Intel, hated by AMD.... What's next? :D that's going to be really interesting hahaha luv your vids
Dancop I think we need to see the I inside of a titan V core :D then compare to a v100 core and 2080ti
Hated by Nvidia?
love you too dancop, best oc master :D
doubt he's hated by AMD, just making them glare at their PR guys.
Poor via
My assumption is than AMD mirrored the Epyc PCB to prevent compatibility between the 2
and mechanical support
I agree, and have the same pcb cut and layout to be cheap to manufacture same machine produce 2 diferent die
That conclusion makes perfect sense, they've left the option there to release both a 24 and 32 core Threadripper.
Yea I actually forgot to say that 20c, 24c, 28c and 32c are all possible. Should have said "up to 32c" :D
I think the lower infiniband interconnects wouldn't make this possible, and/or with the higher clock speeds, the excess heat would be too much. Even with two dies active they already recommend water cooling and high end cooling solutions only. More dies and cores would mean you would need phase change cooling, especially at any higher clock speeds.
Are 20 and 28 cores possible? I thought there had to be an equal number of cores active for each die. Epyc jumps from 16 to 24 to 32, there are no 20 or 28 core Epyc CPU's afaik?
Individual cores in each die might not be working so well so they may be disabled. So likely to be matched with dies of equal core counts and since there are 4 dies per cpu core counts will likely be divisible by 4.
It seems like all active dies must have an equal amount of active cores, and both CCX's in each die must also have an equal amount of active cores. And there has to be an even number of active dies (so 2 or 4, or just the single die in the case of Ryzen).
A 20 core Threadripper or Epyc would need to have either a configuration of 6+6+4+4 or 8+8+2+2, and I don't think that's possible (that the architecture or infinity fabric or w/e can't work like that). For the same reason, there is no 10 or 14 core Threadripper.
Or I could be completely wrong, and they can run whatever configuration they want, and it's just a coincidence that all Ryzen/Threadripper/Epyc CPU's have core configurations that fit this pattern :D
As you said, i also believe there might be a 32C ThreadRipper for the foreseeable future. As a 1950X owner i can only be excited for what's coming to improve this Workstation. KeyShot and V-Ray would 100% surely love all those Cores. Very interesting video as always der8auer! Great findings!
Cristiano Siqueira you will not be able to hold EPYC's clocks on modified Threadripper. Plus you will need some monster cooler to cool EPYC cuz under significant load like AVX instructions cpu can go up to 300-350W.
youll see 300w consumption with the higher clocks
I think it is definitely not too bad to be honest. While Overclocked, the current 1950X can already consume up to 300W when Overclocked, the Intel Counterparts a whopping 500-600W. I believe it would still be doable for those on a Custom Loop with not many issues.
yeah, interesting balance between the number of cors vs core clocks to stay in the watt budget of the platform, and the watt budget is limited by the cooler and the VRM. A 32c TR would be cool to see, tho I have doubts if it would be that much better due to the need to lower the clocks to stay within the platform's watt budget.
Yes, the VRM can be modified, and Ln2 cooling can work for short periods of time. Many that use servers and workstations are unwilling to violate the service plan for there hardware, making VRM mods a non-option. And it is incredibly expensive and difficult to make a room of servers or a workstation run 24/7 with 99.999% uptime on Ln2, especially when "Failure Is Not An Option", lol.
That's not possible I think. Threadripper motherboars only have power and RAM paths to the 2 dies. The other 2 dies don't have paths from the motherboard. At lease the memory can be used through the infinity fabric but that's going to be a huge bottleneck...and power would be ridiculous if they actually have traces on the motherboard to the other dies too.
You are tech god
how does he not have more subscribers??! seriously my favorite channel. so much information and no unnecessary filler. Thank you so much for your hard work and videos, the effort and craftsmanship definitely shows
Slowly getting there :) It just takes time. Thanks for the kind words tho! Really appreciate it.
I have strong feeling the fanboys are too dumb to understand what is going on in here
Dave Williams
Not really, never found anything interesting in overclocking channels up to this vid. This dude clearly does way more than simply changing clocks in the bios xd. Think he just has some negative pr around him but that will solve itself if he keeps this up.
"Don't quote me"
-Der8auer, 2018
wait, did you just quote me?
der8auer P-possibly
I think those x-rays also show which dies are actually active in TR. In the TR single die pics named OL and UR are fewer vias underneath the dies than in pics UL and OR. My guess is those are the 'missing' memory channels and pcie lines from the 2 inactive chips. In EPYC every die has all the vias in place.
Spot on, 32 core Threadripper just like @der8auer predicted 6 months ago.
AMD has been very smart with the release of it's ryzen CPUs, interesting to see where things will go.
My pipe dream would be a TR-4 based APU with vega and HBM on board, maybe two zeppelin dies, a vega die, and HBM2/3 connected with infinity fabric.
Haven't put more than a few seconds into the viability or reason why this should exist beyond being very small, but I love the thought
I had the same thought, however it would only likely be 1 die or 8-core/16-thread max because of power draw. 180w for 2 cores. The one advantage that Intel really has is a much lower power draw per performance. Which is likely the only reason the two paired. AMD just developed better power to wattage GPU while Intel the better power to wattage CPU. Otherwise I doubt they would have collaborated together on this.
holmd90
X399 is a prosumer platform. APUs are budget options. If you buy into X399, you are sort of expected to buy a beastly graphics card or even 2 (64 PCIe lanes).
Not likely to happen, even with Navi. The extra manufacturing overhead of doing all of that, all of the time and money it takes, wouldn't be worth it when the audience you're targeting is spending $500+ on a CPU. At that point you'd expect them to have enough money even for the most basic of graphics cards.
It's actually possible, AMD was talking about it a while ago, actually the very first sighting of vega interestingly enough.
Jeremy Brod have you seen the power consumption of the 7960x and the 7980xe? Ryzen 7 also consumes less power than Intels 8 core cpus
I don't share your conclusion. Threadripper is a low volume product and they probably just did it this way to reuse some of the tools involved in making Epyc and saving costs. You don't have to design a completely new PCB or replace any dies with glue. I'm sure the dies are defective and albeit connected to the substrate, there won't be any traces going to these pins at the socket.
I also doubt we will see a 32 core with weird configs like you described. Having only 2 dies connected to 2 channels each would lead to (even more) asymmetric latency. And only 4 channels in general is just not enough bandwidth. I mean there's a reason why Epyc is 8 channels. And the people that demand 32 cores, but then don't want guaranteed ECC support and other Epyc features, you can count on one hand.
The X-Ray images are super interesting. Thanks for sharing!
I think they could move the threadripper dies to an epyc substrate, however I think the limiting factor is more or less heat. 2 active dies on threadripper are running at high clocks than on epyc. I think it is a one or the other scenario. More cores or faster cores, but having both would likely be too much for any cooling system other than phase change.
J0k3r every single mem channel can be handled by single die but that would change the pinout meaning a new motherboard so yeah, 32c tr is possible but can require new motherboard design/chipset even the socket stay the same
+Tuna Yücer
I don't even think you would need a different socket or mainboard if you keep it 4 channels. You would just need a different substrate to connect the dies differently to the already existing channels. But you will still only have half the bandwidth.
Some dies are set up for multiple memory configurations with boards. Other server cpus have worked on consumer boards this way. Some even support multiple memory types such as DDR2/DDR3 or DDR3/DDR4. So memory config may not be a limiting factor.
threadripper supports ECC.
It's 3:30 am but who can close the browser when you see a new upload by Roman. Keep up the good work mate!
Agreed, eyes closing but DAYUUUUUM I gotta watch.
4:37 , thought he was going to say "2+2 is 4, - 1 thats 3" lol
Elijah _ lol what was the name of that song that says that? Mans not hot? Lmao 😂
Quick maths!
Awesome work Dude, thanks a lot, I was talking about this for many months on hardware forums, really happy to see that you make a video about this
"I borrowed by delidding tool to Linus Tech Tips..." ...and the bastard hasn't returned it yet and I believe he will never will.
That's what he wanted to say. :D
I knew it was a one way ticket when I shipped it over haha
I am not alone when I say thanks for the insane effort you go to in your videos man.
Every single point mentioned in the video is exactly what I expected from the beginning. From a production line setup/operation, development and manufacturing cost point this is the most logical and cost effective way.
well done sir, you are 100% right with the 32 cores CPU
Amd marketing on social media don't know what they are talking about and they didn't think anyone would prove them wrong.... Lol
Mess with the wombat - get defeated in combat :D
Not like most people can afford to start taking Threadrippers and EPYCs apart like this, the odds were low but was bound to happen.
love your work and dedication . Hope to see more of your great work in 2018.
also loved your Lian Li PC-011 case. great design with a balance of FORM and FUNCTION.
Much cheaper and quicker to just disable dies, especially in AMD's position, than it is to setup fabs to create many different types of sockets, infinity fabrics, and this and that. When it costs them ~$20 for a single die, with a total package cost of ~$100, they're still making lots of profit with the Threadripper's.
Also, as you speculate, it leaves them with lots of future expansion options.
Very interesting. But if you look more, two diagonal cores in Threadripper (upper left and lower right) have less conecctions to the substrate, and also in the the upper and down area (totally free of vials on Epic), there are two gropus of them cutting that part in Threadripper.
For the way that all the dies looks interconected with Infinite Fabric, you can't go for one way to the another with only two cores, you always need to go over three of them at least, so my theory is that the other cores are there for an interconection purpouse. Those dummy dies could have all the cores, cache and pci lines disabled, but still could've the i/o part working. That way they can use bad dies, maybe not completely dead, probably just chips discarded because they use too much energy when full operational (like most CPU with less cores, its not because they are broken, but because they exceed their TDP when fully enabled, that why most old Athlon and Phenom with cores disabled can be enabled, if you can manage the extra heat).
I apreciate the hard work!
Keep going.
A pizza joke??? Omg proof that der8auer is not a robot?? Seriously now dude, really nice work; keep it up ;)
I always figured that they used dies that couldn't reach any of the advertised clock-speeds for their products for the dummy dies so that they could keep all of the infinity fabric connections to minimize latency when the two good cores needed to transfer data across dies. It isn't like they could do anything else with their worst yields.
Great video! Another way to be 100% sure whether all 4 dies on the TR are electrically connected or not, you could simply fit the delidded TR on a PC and power it for a few seconds. Then you could check their temps using a cheap IR thermometer. Do you think they would have been blown immediately?
deBauer rules, thanks for deliding and getting deeper into architecture of these CPUs.
IIRC, AMD originally said that the dummy dies have no "working" transistors, not necessarily no transistors period. they could be dead dies.
In that case they would fake the yield rate
TR seems like it would be such a small percent of sales, even if they were using dead dies, yield rate wouldn't be changed that much. They already have high yield, but you could take the dead dies and call them good, increasing yield rate, or you use the dies after you've already declared them dead, which wouldn't change the yield rate. Not sure if this is what you're referring to with "faking" the yield rate.
oobligah if they are dead, why are they soldered to the IHS at all? That gold contact solution isn't cheap
not sure what you mean by gold. pretty sure there isn't any gold in the solder between the IHS and the chips
Did you not notice that 2 dies on the threadripper are missing like 30-50% of the pins from the CPU to the sub strait, basically exactly what was stated.
I think you mean vias under the die, not solder bumps. That’s something completely different
Mhmm threadripper pizza. 🍕
Brilliant analysis as always, great effort thank you!!!!
All of this reverse engineering including microscopic X-rays, simply amazing work Roman, thanks for sharing! I only hope you checked with AMD, and they won't hold it against you :D Fascinating findings and looking forward to those higher core count threadrippers!
Well it's public info anyone could do if you invest money :D So not much they can do. Thanks tho :D
Excellent content as usual! Thanks for giving us an insight into what ACTUALLY is going on! Keep it up
wwwooooowww this video is awesome i'm really impressed with the level of detail and the time spent of research, and you explain all with too much details, and i loved that...
Great information brother ! Impressive work !
Fantastic video, with the usual level of great detail. 32-core Threadripper is almost a certainty. I take it your TR and EPYC are now ornaments.
Seeing how complicated this thing is, my faith in the human mind returns to me.
Cool video. Must have taken you a lot to get it done. Funny thing is, it just so happened I was not watching on Sunday. But Thanks. Much appreciated.
I'd assume that the S32200 and D32188 are model numbers for the dyes. If the letter is different for various processors then it could indicate the processor model while the number indicates the model line, hence why I'm taking it into consideration along with the number code.
Nice work! I just do not understand 1 thing now with this thing. Why they are lying about this? They knew you would double check that :D
No idea man xD I'm asking myself this question every day haha
marketing means lying for a living
Probably just PR guys that don't know what they're talking about.
ouch. You took one for the team here. That is a lot of money to spend to discover the truth. I'm thankful not just to you, but your patrons who made this possible. I just found you after seeing you have a conversation with Steve at Gamers Nexus from CES2018. This was a great analysis.
You were right! AMD 32 core threadripper 2!
The mechanical support argument makes sense since they don't have to have two different production lines, one for threadripper and one for epyc. This way they have only one line, same tooling, same processes etc. I would say that the two additional dies might be scrapped ones and indeed not mechanically connected. Having 4 active dies with varying core counts would complexify the cache and memory management and threadripper performance would vary widely from one threadripper cpu to the next.
Hmmmm... what if the difference between those go beyond firmware? My guess on that will be that the missing caps might be somehow shutting down failed dies, maybe TR CPUs start as an EPYC, and if there's a defect in the PCIe or memory controller area, those dies will probably be deemed as those alledged "dummy" dies.
I believe that it is possible that AMD may eventually release a 32-core TR CPU, but maybe not because they did really plan it, but rather because they might be actually wasting otherwise viable cores. They might still need to figure out how to disable PCIe and/or MC on those defectice dies while still be able to use the cores.
César Morgan Don't forget the option of partially failed dies, like the fabled 3-core Intel chips that were rumored to be 4-core chips with a failed core, or the extremely famous 4.77MHz 8088 chips that were failed 6MHz parts sold cheaply to IBM.
@der8auer - Thank you for your efforts and expense but *that's a terrible X-Ray* 11:50 - try CreativeElectron.
Along with better imaging software they make their own machines.
They can slice out an image at any depth or angle, no squinting at poor contrast/fuzzy low resolution photos.
Even NASA sends their stuff there ...
YT,
Rob
Will check them :) thanks for the info
Their image gallery is here: creativeelectron.com/x-ray-image-gallery/
Your option 3 is likely as it’s been done in the past where the sell the ones with the defective cores while stockpiling the next versions to be released. It’s not even an indication of yield as they could have a high yield in the stockpile being held back.
You're an exceptional credit to the industry. Thank you for your time and effort.
Thanks a lot :)
What research, hugely impressed with your dedication.
Thanks man :) Appreciate that
Thanks for another fine and useful example of german persistence and engineering talent.
This is very interesting and thank you for the video. I think it will be much easier to find if AMD have dummy dies or defective dies on board using an infra red / thermal camera. If not all dies are active the heat distribution will be different and you do not need to go over the whole process of opening the cpu cover. Some comments indicated that some of the dies might be defective and so the configuration of the cpu might change accordingly. It is possible, but I'm not sure about this point since you will need to have some tests before placing the dies on the board. If one die is defective in a way of shorting the circuit it might born all the other dies. It is hard to know how things are connected without the design layout or schematics. I'm not sure if you can map the pcb connection by measuring the resistance between all the pcb connection. It will be time consuming work. If there are defective dies on board it will be nice to see the different between 1900x, 1920x, and 1950x cpu heat distribution.
Perhaps TR is a binned EPYC bound to a different PCB so there is no cross-compatibility? That would explain why there are four transistor-laden dies in TR and would also make sense from an economic standpoint.
So looking at the xray shots, it looks like that on the threadripper dies, the dummy dies have fewer electrical connections than the functional dies while the EPYC dies all have the same distribution of connections through out all four dies.
or ... perhaps sometimes they can pull the cores they need off of all four. That is, all four are defective in some way but they are able to select-out the number of cores they need from it.
Probably a silly idea but...
-Matt
Man that's an expensive experiment, respect to you good sir :)
Very impressive and very cool!.. I'm going to have to donate to your schnitzel fund!
Your videos are really good. Congrats, man! Subscribed.
Yields could be very very low on 8-core chips (threadripper guarantees 200Mhz XFR boost atop 4.0 Ghz unlike 1800x which is only 100 Mhz XFR boost atop 4.0Ghz) so they might use 2, 4, and 6-core chips (4x of the chips) in a threadripper. After all, and at that level of performance, very few chips probably pass production yield testing on all 8 cores.
Or it could be that the switching fabric and/or 128 PCI drivers is distributed across all 4 chips. And so when you have 2 working chips, you still need all 4 chips to complete the switching fabric and or 128 PCI lines, without leaving any holes. This way, they just design a 1-cpu config and a 4-cpu config and they are done, with only 2 manufacturing setups.
I bloody LOVE HARDWARE
Therefore a Threadripper heatsink/watercooler would work with EPYC?
no, you need a special bios update for that
yup
Thanks a lot for the video. It was really interesting. What happened to these processors finally? are they still working after scalp? I will wait for another video where you start both of them!
''Bined'' cores are the ones that failed is my guess aswell. As you can combo core pairs to make maximal use of the material they are made on (of, not sure what the name of it is hehe)
I was thinking that maybe all 4 chips "work" and are electrically connected but during the testing phase only a few of the cores is stable on a die so they just enable the best ones to make a complete Threadripper and disable the crappy ones in microcode. But unlike past CPUs that you could "unlock", they kill the connections to the CPU controller to unlock cores.
Man you got balls sir, im going to hit subscribe... ive heard of some dude delidding a threadripper and low and behold...
Well lets see if you can awaken those extra dies, however I suspect that the missing pins and such. They might be dead or not fully functioning. It is kinda expensive to redesign a whole substraight, we can see they only made minor changes between, it might have been cheaper to not redesign the package and just use dead dies for support, it would probably save them money versus designing a whole CPU package as complicated as threadripper.
at 11:25 you mention the 32200 and 32188 code, but left from those there's a "S" for threadripper, and "D" on Epyc, It could mean if the processor is made for 1 (Single), 2(Double) processor configuration. Supermicro Boards code use those letters to distinguish 1 or 2 CPU config. If you happen to have, or have had a 7351P, 7401P, 7551P I guess you'd also have the "S" marking on them, and probably the 32188 code (could be a variant, since they are a rare model of Epyc cpus).
Your content is so good man.
Thanks man :)
For anyone reading this, you're in luck. It's not just another benchmarking video. Subbed
Well I think your reason for the extra cpu dies is not impossible, just I think there is a more likely explanation. Like you said some dies do not pass, it may be faster to just sort them, use a similar substrate in both threadripper and epyc, same layout but slight variants in the configuration of the substrate mainly the infiniband interconnects it is just that threadripper has the same interconnects as the epyc substrate, but the epyc substrate just has more added to support extra pci lanes, extra memory channels, and improved machine learning. But if you were able to look at the wafers on both threadripper and epyc I bet they are identical. They come from the same wafer. Plus you also hinted at part of why they are the same as well. Threadripper have a high clock, which means more heat. So either it came down to threadripper needing a larger substrate and surface area to get rid of that excess heat and a smaller substrate was not working. OR by keeping them as close to each other as possible in design they were able to use the same manufacturing setup with as few changes to each die configuration as possible ultimately saving them in manufacturing costs. Or a combination of both.
it is likely that option 2 and 3 are both the case here with threadripper.
AMD was surely not expecting you to buy a EPYC CPU lol
I wonder if those capacitors were added to TR that exist on Epyc, whether it would do anything, and whether the dies became active.. It wouldn't matter in my opinion, because these dies are likely so bad they're unusable. I do, however agree with derBauer on there being plans for a 32 core CPU, when there is another chipset / board available to use the 128 PCIe lanes and additional memory lanes. My guess is it will be around a year, likely around the time Zen2 (not Zen+) is nearing.
'No path to operation', that could mean 'electrically connected', but disconnected 'somehow'. They could easily make minor electrical changes and micro code changes, that would make a microcode update 'impossible' to enable all cores. Like having a vasectomy and being neutered are two different operations, with the same end result. Well, actually in a vasectomy, you get to keep your 'rocks'. And yes, I know some vasectomies are reversible, but are some CPUs, there's the rub. ;-) Oh, has anyone done a FLIR analysis, to see if the 'rocks' are emitting heat?
Is it possible that the little 8dotted passives around the outside on top and in the middle on the bottom turn cores on and off and they sort their dies so that the there are at least 4 usable cores on each die for the 16core TR and only 2 cores/die for the 8core TR? Also consider that the higher clock rates would determine that not all cores on a single die could run at around 4GHz because of heat dissipation needs, and all of them might not test that high either. I"m suggesting a sort of binning of cores where the better ones are enabled. It would be interesting to survey the top and bottom passive positions between TR models and even between the same models, but having to delid to see the passives on the top would get expensive.
that second theory you mentioned was true on Phenom CPUs; there were certain motherboards (mainly from Asrock) that let you enable the "faulty" cores, maybe they're just repeating this method. I'm certain you're aware of this so I'm just saying that it is possible
I belive its more expensive in tooling to develop/produce a 3rd. Socket insted of using Epyc socket and use 2 already
bad Cores to make it mechanically stable for heatspreder mounting.(why make something when U can use the garbage thats already made with perfekt size?) take into account how many (few) Threadripper they are selling relative to the Rysen 3,5,7.
All they need to do is changing substrate. Your other solution will cost more in R&D, tooling
and pure square meters in production center.
32Core TR will probably be on 7nm. We'll just have to see if they actually launch the 64Core monster Epyc this summer. If yes then most likely we'll be seeing higher core count TRs, the only thing preventing them to launch higher TRs is interference with the Epyc line-up. The only issue is: Who will buy such monsters for non-server class use in the next 5 years?
Why not make another delidding device with a blade holder instead of a pusher block? This would maintain a more precise height and angle to perhaps avoid damaging the board. At the very least it would keep your fingers out of the way.
"I'm not sure what it is."
Fantastic.
My thought was that those two dummy dies were Ryzen dies that failed QA but were good enough to support an interconnect. The idea of finding a use for parts which would otherwise be trashed appeals to me, especially if the result is a cool product like TR.
I do remember reading another leak elsewhere indicating that a 32 core was coming. I'm certain you are right on.
I thought we were talking threadripper not Epyc. Sure Epyc 7601 is $4k, but threadripper 1950x is ~$950, I wouldn't be shocked to see Threadripper next bring a 32 core monster, and given the comparisons (Epyc 7401 (24core) is about $1200) I wouldn't be shocked to see a TR at that (32) scale coming in under $3000 just to bite intel. Now, would it cannibalize Epyc? probably for certain border cases, but overall I think it would be a win for AMD.
it would be interesting to see a thread ripper using the area occupied by those two extra dies for a huge amount of L4 cache.... i wonder what performance gains would be.
But der8bauer, using the Infinity Fabric for memory access and PCIe access with severely degrade performance as now 2 memory controllers have to cope with requests from 4 dies. And 2 PCIe controllers have to cope with requests from 4 dies. Also, the latency would be a serious issue.
Not saying it's not possible (I would be happy if they showed Intel up), but no likely IMO.
mr. derbauer the link provided for the pics is not working. and by the way the Xray pic of CPU is just mindblowing. what i am seeing from the previous video that all the dies had transistors and if by somehow placing some SMD capacitor, is it possible to get the other cores working? also i guess if there are no physical connection like pcb traces then yeah they are useless cores in the big TR4 socket/ PCB.
also now amd moved to 7 nm then i think in that space they could put 8 of the chiplets and that could possibly lead to a 64 core 128 thread CPU. which is just awesome to see delidded by you and may need some engineering witchcraft , who knows. have a nice day.
Nice video, lots of great info. Does the Eypc CPU work on a X399 board? If yes, does all Cores, PCI-E lanes and memory channels work? To those who ask “why test this”, it’s just a matter of curiosity. I mean, why the heck not?
When chips are made they inevitably have defects, however, if the chip has multiple cores, the defect may only affect some of the cores on the chip, leaving the rest operational.
It makes perfect sense to disable defective parts of the chip and use the rest. Chip with 2 faulty cores becomes two core instead of four and joins the rest of the package.
The entire package is comprised of chips with varying performance and they are matched to produce the final result in line with the expected performance of the end product.
There is nothing bad about the practice and all chip makers do this, the reason it is under wraps is that people do not want to buy chips that have dead cores in them - even though those dead cores have no effect on the performance. It's a perception problem. Companies do not make lower capacity chips, they make one chip and when parts of it are faulty it becomes lower tier product. ie 12 core 8 core etc. Or it runs at a lower frequency.
I do not get why this is even a thing
I think that option 2 is not really unreasonable. They would need some structural support under the IHS to prevent any uneven flexing when under pressure from various coolers, etc., so why waste money on getting new pieces for support when you can just take dies that failed in manufacturing? The PCB tracing could be there without the dies actually being connected; if I got everything correct, the traces look like the ones on the Epyc chip, so they might share large parts of the manufacturing process. It would be way cheaper for them to have two series of processors aimed for different markets share as much of the manufacturing as possible, with the differences being what actually makes all dies work (on Epyc) and also so that it wouldn't be possible to use an Epyc in a Threadripper mobo (although I don't know anything about the possibilities of that). To me, this sounds like the most effective way of spending you money; cut your losses and have large manufacturing overlap between two products for very different market segments - instant profit!
Amd just proved ur prediction of 32 cores tr is right
Well there are things like dummy dies . They help with uniformity of heat expansion. If they had to try to design a place holder for stress then it could change the whole design from thermal design points of view. Time is money and if it works then n why frack with it. My theory
Back in the days i remember the pencil mods of AMD CPUs, I'm wondering if you tried hacking the TR to unlock the other 2 dies. Things were quite simpler back then.
RE: the comments @2:30: have you ever heard of binning? They use one design w/32 cores and disable imperfect cores, and sell it as a lower model, because less of the dies are functional.
Awesome video!! I'm wondering what would happen if the SMD components were transferred though? There must be a reason why different CPUs have different locations populated. Nvidia do similar things with resistors to ID graphics cards - on some models, transferring resistors from one location to another makes nvidia's drivers ID the card as a geforce, a quadro, a GRID or a TESLA. I remember back in the Athlon XP days, there were lands on the top of the chip that could be bridged or cut to get the chip to ID as another model..
Good shit der8uer!
the code may be for the layout of the caps. everything looks identical except for the code the dots and the caps. not saying anyone would but maybe changing the cap layout could change the "cpu" making it epyc or 1920x or whatever. probably not very useful because they disable the cores for a reason right?
der8auer a true professional
You are an absolute legend.
Yummy...nice 2000$+ silicon pizza. Great video as always ! :D
Very interesting. It would be cool to see a 32 threadripper.