Asymmetric Multi-Processing
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- Опубликовано: 11 сен 2024
- While testing a batch of CPUs, I accidentally did something that I thought wouldn't work, but it did. I mixed a Xeon L5640 with a E5630 CPU in a Supermicro X8DTH-iF motherboard. Normally, I would think the system would not even POST in such a configuration. However, contrary to what I thought I knew, the system fully booted up, and recognized both CPUs. In this video, I'm going to demonstrate this, and show you how this Assymetric Multi-Processor configuration manifests itself in the system BIOS, in the Linux OS using various utilities, and run a CPU benchmark on both distinct CPUs in the same system. I didn't know this was even possible, and thought it was an interesting discovery so I wanted to share this with you guys!
Timestamps:
0:37 - How I discovered asymmetric multi-processing was possible
0:59 - Introducing the CPUs
2:52 - Installing the not so symmetric CPUs in the same system
5:12 - Powering on the server with asymmetric processors
5:46 - What the BIOS menu says about the asymmetric processors
8:26 - Booting CentOS 7 Linux with asymmetric CPUs
9:03 - How does 'top' show the asymmetric CPUs?
9:15 - What does lscpu say about asymmetric CPUs?
10:20 - What does inxi say about asymmetric CPUs?
12:55 - Running sysbench cpu benchmark on asymmetric CPUs
14:03 - Final thoughts
16:00 - Wrap-up
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#artofserver #assymetricmultiprocessing #amp
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An interesting combo would be brute forcing the Performance-Efficientcy Cores feature found in newer Intel cpus.
Like lower end cpu with capped power plus higher end cpu on full blast
thanks for the suggestion!
If you have an SR-2 you can even do this for the memory side of things. You could have something like an overclocked X5690 with full memory speed, and a forced lower multiplier low power CPU with low memory clocks and voltages on that CPU's imc
Would've been interested to see the output of `lshw` and `cat /proc/cpuinfo` whether or not it correctly identifies the cores and separate CPUs.
Also my soul left my body when he used an electric screwdriver to just fully screw in one screw on each side 💀
I'm glad to free your soul! LOL
Linux likely uses the NUMA nodes to determine SMP or AMP as you can see by the correct counts at @10:11. I've never tried to do this before either so I learned something today!
yes, i suspect so too. thanks for watching!
Regarding 10:09 ... look at the NUMA node[01]. It's correctly reporting number of logical CPUs for each socket. node0: 6 cores (+HT), node1: 4 cores (+HT).
Indeed it does!
I was running a 333 and a 433 celeron together at the turn of the century. Never really believed the boilerplate compatibility bs manufacturers come out with. For the most part it's about SUPPORT. They don't want to spend extra money SUPPORTING oddball edge-case configurations.
Doesn't mean it doesn't work. Just means they wont support it.
yup.
It would be interesting to try something like this with one of the enthusiast i7's and the equivalent xeon.
interesting thought. i don't have any LGA1366 i7 though...
Pretty cool that works. I would chalk it up to one of those "it shouldn't work but it basically does and is certainly not recommended" situations. My own anecdotal experience. I have an old HP ML350 Gen 6 with a pair of L5640s in it. And while the CPUs are a matched pair they are often times running at completely different clock speeds, in a sort of asymmetric way.
Could be that the chipsets of that gen were a bit more forgiving as those chips use QPI 1.0. The Sandy/Ivy Bridge Xeons use QPI 1.1 and maybe Intel took the ability to do what you did in this video out with the updated spec.
yeah, I wonder if it works on all platforms from the same generation or if this particular motherboard is just less restrictive?
I don't remember where I had read it, but years ago there was an article talking about potential advantages to asymmetrical processing. I believe it was with Intel hardware specifically, and that the design was limited to working only with some limited CPU combinations.
Thanks for sharing!
I recommend switching to PiKVM for your KVMoIP needs. So much better console experience.
thanks for the suggestion. i've never used it before.
A cooler thing would be to cat procinfo as they dump for each CPU thread and see if you get the same model number of the CPU when you do it.
My X58 single CPU setup is super cluttered as it dumps the same CPU info, for even the Hyperthreaded threads for my W3680. (Yes, I did the dirty thing of a Xeon in a consumer motherboard.)
can you please share with me what you mean by "cat procinfo" ? I'm not familiar with that...
@@ArtofServer He means #cat /proc/cpuinfo I imagine
1. This is still SMP
2. There would be no NUMA issues, as they still use and speak same coherency language
Symmetric Multi Processing doesn't refer to amount of cores, speed or even architecture
It refers only to where kernel is run
SMP kernel runs on all cores equally
ASMP runs on single core and manages rest of them only for user space
NUMA stands for Non Uniform Memory Access
Speed of memory and/or number of cores does not influence NUMA in any way, as procesor 0 cannot read memory of processor 1 and vice versa. It politely asks another processor to read or write memory and waits patiently to finish
thanks for sharing!
if thats the x8dth i think it is, the CPU's are not connected to the hardware the same as modern CPUs. you can have one CPU and still access all the PCI lanes and other hardware, where as newer hardware splits lanes b/w CPUs.
I would speculate that difference in arctitechure could be related to why this works.
i might mess about with one of the x8dt6 I have. see if itl run an x55 and x56 that I have. I suspect that would not work, but I never did try it.
Yeah, it is X8DTH-iF. And yes, PCIe lanes are connected through dual IOH so that's why it can have that many PCIe slots. Also the BIOS SPI connection is via ICH10R South Bridge, so you can boot with either CPU0 or CPU1. Unlike the newer generation, where the SPI is connected to one of the CPUs and that CPU socket must be populated to POST.
I'll be interested to know what you discover playing around with the X8DT6 board. That was a good board for NAS build!
@@ArtofServer interesting! I don't have an X8 board, just X9 and X10's. Now I have to go look at some various block diagrams of X8/9/10 to see how they may differ.
Do you get the same results if you switch the cpu's into opposite sockets?
Very interesting suggestion. I don't know but I might try it out ...
I think AMP is just working similar to the big/little core in Intel 12nd/13rd gen CPU?
well, sort of, but I think the Intel P/E-core thing was more inspired by similar designs from ARM and mobile phone CPUs. This westmere stuff was way before that.
What happens if you try to run a program that uses instructions that one of the CPUs does not support? It can then not simply switch from one CPU to the other as different binaries are needed?
I think both of these CPUs have the same instruction set.
I did this on my old SPARCStation 20 with SM61 and SM71 CPUs. Compiled a program specifically for the SM71 that had a slightly newer version of the instruction set, then ran it in the mismatched 2 CPU system.
When it executed on the SM61, the program dumped core. Amusing, but less dramatic than I'd hoped.
I still run the same board X8DTH-iF but with a slightly modded BIOS.
That aside most OEMs will check at boot if both CPU's are the same... And halt the system if they're mismached. (I think memory is foggy)
Those are good boards! What type of modded BIOS?
@@ArtofServer I updated and extended the CPU microcode, changed OpROM versions, newer Intel AHCI/RAID/NIC modules...
ive got a Z800 which will NOT do the same thing, at least not with the BIOS that I have in it. it also wont run the X5680's which really pisses me off...but anyways I wonder if this is a Supermicro thing or if maybe it was just never limited on thge 5000-series chipsets and Supermicro allows it but HP doesn't? I dunno....effin cool though! But I think it MUST be vendor dependent
Hmm... have you any other dual socket systems to try out?
Could be a case of lowest common. But my first thought was that it was just showing CPU0. I'm surprised the bios doesn’t just show CPU1...
Yeah, I don't know for sure. It's seeing CPU0 with the L5640 and is using the base frequency of the L5640 at 2.26GHz, but it is using the max RAM speed of 1066MHz of the 2nd CPU E5630.
I think you just found at least two bugs in the kernel :D… I wonder now how vCPU hotplug will behave (already looking for qemu/xen options to set it up)…. I didn’t catch the os/kernel you were using… what was it?
CentOS 7 Linux kernel 3.10.0-1160.90.1.el7.x86_64
@@ArtofServer It would be interesting to try with a newer kernel to see if it can take advantage of the different clock speeds, instead of just using the lowest common denominator.
Think about it, how would the little/big core thing work if you could not do asymmetric multiprocessing. Now whether it's actually a good idea or not is another question.
This is an ancient server and CPU architecture from 2010 though...
I can imagine NUMA issues
Why? Linux is not going to populate NUMA nodes that don't exist
If you look at @10:11 it correctly determined the NUMA nodes so it should work just fine with any software written to correctly enumerate and use the NUMA nodes.
Don't cross the streams.
Every CPU has model, stepping, revision info stored in some kind of ROM ready to be used as an identifier for the system. This way CPU-Z should have no problem identifying each model switching between sockets, I'm sure there is a Linux capable alternative. The fact that they boot, tells me that Lxxx SKUs really are just low-freq binned versions of same silicon in Exxx.
P.S. 4:30 Pretty sure that springs do not work in a fully compressed state.
What do you mean about "springs do not work in fully compressed state?"
@@ArtofServer If you compress it all the way, you overcome pressure that they are designed to apply on CPU heatspreader in this case. No better that a simple screw that you would need to tension with a dynamometric screwdriver otherwise. Regidity of the spring is calculated to be roughtly equal to correct torque, so you should free the scew a bit, so the spring would hold the assembly in place.
@@Mr.Leeroy You should fully bottom out those screws, as they are designed to apply correct mounting pressure. Just don't overtighten.
@@mihumono For "bottoming out" there exists helical spring type washer, that costs pennies compared to actual spring designed to spec. You are over-tightening by bottoming out.
@@Mr.Leeroy you are not. Have you ever used those heatsinks? The screws are not fully threaded.
yep, nothing quite new.. ran a dual P3 system with an 850Mhz and a 1Ghz back in the 90s.. it worked too even though it wasn't "supported"
thanks for sharing!
@@ArtofServer but I haven't seen it tried on semi modern hardware.. very interesting non the less!