Transmission Gates| Implementation of LOGIC GATES using (Transmission Gates )

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  • Опубликовано: 28 окт 2024

Комментарии • 64

  • @mayanksinha7612
    @mayanksinha7612 6 месяцев назад +3

    Brilliantly explained. Thanks a lot tomorrow is my lab exam on cadence this will surely help me a lot in designing circuits of logic gates using transmission gate ❤❤

  • @rathnarajugudala3389
    @rathnarajugudala3389 6 месяцев назад +18

    2:53 A random girl🥱🥱

  • @lightningllama
    @lightningllama Год назад +4

    So straightforward and well-explained. Thanks a bunch!

  • @young_sparrow
    @young_sparrow 2 года назад +2

    Very nice and correct explanation.. there are many wrong videos on RUclips wherein they claim to implement AND gate with only one transmission gate.. may god bless you!

  • @informationtech4170
    @informationtech4170 11 месяцев назад +5

    2:53

  • @vaibhavk3177
    @vaibhavk3177 Год назад +4

    At 2:49 great voice....loved it!!

  • @krishnakittu6637
    @krishnakittu6637 4 года назад +6

    Thanks ....It simply understandable...It helped me

  • @dr.saadsyoutubechannel3723
    @dr.saadsyoutubechannel3723 2 года назад +6

    For AND gate, you don't need two TGs. The bottom TG can be replaced by an NMOS only because it is always transmitting Logic 0.

    • @vamosabv
      @vamosabv 2 года назад +1

      Wouldn't that lead to a high impedance state and not 0? I thought we were using the second TG so that we are sure the ground is being pulled to 0.

    • @kuroyasha9009
      @kuroyasha9009 Год назад

      That will make it the same as cmos logic

  • @adityamahilane5709
    @adityamahilane5709 2 года назад +1

    Badhiya samjhaya hawa ji👍

  • @maddalarachana9350
    @maddalarachana9350 3 года назад +2

    Thanks for the nice explanation.

  • @invi-tronics530
    @invi-tronics530 3 года назад

    liked the way of explaining... everything in detail

  • @howyourcollegelooks6416
    @howyourcollegelooks6416 4 месяца назад

    awesome bro/ thanks well taught completely understand the topic,,,,,arigato gosaimas

  • @gumbyybumg
    @gumbyybumg 3 года назад +1

    Great explanation! Thank you very much

  • @RekhaChavan-gp6np
    @RekhaChavan-gp6np 5 месяцев назад +5

    Nmos passes 0 and pmos passes 1 effectively correct it

    • @opshot1144
      @opshot1144 29 дней назад +1

      wtf its correct once u check

  • @nikhee8
    @nikhee8 4 года назад +5

    Thanks man very simple and neat writing ☺️ cool
    Can U upload video on pseudo n mos inverter with neat sketches by this week??

  • @nehasrinivas7501
    @nehasrinivas7501 2 года назад

    Really super explanation sir please do more vedios on this dica please sir 🙏

  • @sagniksarkar33
    @sagniksarkar33 2 года назад +1

    very well explained.

  • @mangapathiraju7198
    @mangapathiraju7198 3 года назад +1

    If only Pmos or only nmos is on, can we say inputs transfers to output?

  • @sarangupta4792
    @sarangupta4792 Год назад

    Simply superb ❤❤

  • @garnikpepelyan8760
    @garnikpepelyan8760 3 года назад

    Thank you. Very good explanation

  • @pranjalpimpale8465
    @pranjalpimpale8465 3 года назад +1

    legendary video...tysm

  • @shraddhalone8151
    @shraddhalone8151 Год назад

    Thanks Great Explanation!!

  • @gurkengerd9981
    @gurkengerd9981 4 года назад +4

    Why do we need to use a second TG for the AND Gate? Y will only be 1 if A and B are 1, otherwise its 0, thats exactly what an AND gate does. So why the second one?

    • @TechBlooms
      @TechBlooms  4 года назад +1

      In the video B is a control signal and the first TG allow only two possible combinations ie(01,11) in which B is 1 and for B = 0 the First TG is open circuited and ull not get all 4 combinations using one TG

    • @gurkengerd9981
      @gurkengerd9981 4 года назад +2

      @@TechBlooms But why does it matter if we actually do something with the other combinations? The output on the right will be 0 no matter what.

    • @TechBlooms
      @TechBlooms  4 года назад +2

      @@gurkengerd9981 using two TG you will get all combination of an and gate which is not possible using only one

  • @camilotello3296
    @camilotello3296 Год назад

    I loved your video! :)

  • @kashifabbasiabbasi5388
    @kashifabbasiabbasi5388 23 дня назад

    High transmission methane in pipeline network, or high electrical power of huge flow of electrons measured, costed, distributed to the end users in the form low pressure or step downed voltage using these electrical and electronic devices like transducers, transmitters in the circuitary ,,is it not,, from where I get professional certification in these industries,,, please guide

  • @foroughyaftan2568
    @foroughyaftan2568 4 года назад +2

    It was so useful

  • @Super_Smash_Dude
    @Super_Smash_Dude 3 года назад +1

    What is a control signal?
    Great video!

  • @abdelazizphysique9739
    @abdelazizphysique9739 4 года назад +2

    hello sir
    thank you for your explanation .
    if possible sir to send me the MATLAB code that allows me to trace the VTC AND with transmission grid.thanks sir.

  • @NOOR-dy6yn
    @NOOR-dy6yn 5 месяцев назад

    Thanks Sir 🙏

  • @emu9991
    @emu9991 2 года назад

    LOVE U MAN

  • @Don_ron666
    @Don_ron666 3 года назад

    VERY GOOD

  • @ԴավիթԲաբայան-յ4ւ
    @ԴավիթԲաբայան-յ4ւ 3 года назад +2

    Wrong logic for And gate. Third option when A must be 1 in case when B is a control signal. See for third line when B is 0, first TG is off, and second is on , and as left side is grounded it's always 0. But we wanted in case when B=0 do A=1.

  •  6 месяцев назад

    Thanks sir

  • @santhipriya9675
    @santhipriya9675 Год назад

    Thank you sir

  • @kumarapuanjali1080
    @kumarapuanjali1080 Год назад

    Thank you

  • @md.mahrufalam4927
    @md.mahrufalam4927 2 года назад

    Thanks!

  • @devgupta9487
    @devgupta9487 10 месяцев назад

    Thankyou bhai

  • @deepakkrishnan7979
    @deepakkrishnan7979 4 года назад +2

    thanq for the video

  • @sahalhossainsiam5440
    @sahalhossainsiam5440 Год назад

    For p mos to on don’t we need B= 1 & B bar = 0 ?!

  • @anbukarasi1389
    @anbukarasi1389 2 года назад

    Thanks 👍🏻

  • @preethikasaran6536
    @preethikasaran6536 3 года назад +1

    At 2:10 when c=0 isn't pmos in on state and a=b

    • @TechBlooms
      @TechBlooms  3 года назад +1

      No PMO's is off as input to it is cbar
      Thankyou for our question
      Share, subscribe , Like ----Tech Blooms

    • @preethikasaran6536
      @preethikasaran6536 3 года назад +1

      @@TechBlooms thanks a lot
      Got it 👍

  • @muditjain1387
    @muditjain1387 10 месяцев назад

    What about NOT gate?

  • @hasanmahmud8010
    @hasanmahmud8010 4 года назад +1

    Where is XOR??

  • @jeffzee3791
    @jeffzee3791 Год назад +4

    2:52 What voice I heard? 😂😅

  • @margaritalilly6807
    @margaritalilly6807 4 года назад +1

    Thank you 🤗

  • @kamrulhassan1161
    @kamrulhassan1161 4 года назад

    Should we join B and B bar

    • @TechBlooms
      @TechBlooms  4 года назад

      No you should not join B and Bar

  • @mdjibrelmansuri4382
    @mdjibrelmansuri4382 17 дней назад

    2:53 🥱

  • @tukaramgoud1650
    @tukaramgoud1650 3 года назад +2

    Not perfectly explained...

  • @user-hp1pw4ip8s
    @user-hp1pw4ip8s Год назад

    awesome

  • @Adithyashetty1310
    @Adithyashetty1310 Год назад +1

    2:52