Hi everyone, Thanks for all the feedback! I'm hoping to make some more videos like this one. To this end, I've made a google form to find out more of what you want to see! It's a handful of questions, all optional. Thanks again! forms.gle/ssNwzTKiioj3RNHD9 Also, I know I ramble in this one quite a bit. It was my first video and I didn't know what I was doing! My newer ones are more concise. My goal is to cram as much information into as small of a time as possible! Appreciate you all!
Thanks for suggesting HDLbits! I've been picking up Verilog in a haphazard way for years, I'm just working through the whole thing now just to clean up and tidy up my knowledge. Thanks!
You are a wonderful presenter and I love your youtube channel! I'm only starting to get into FPGA's, as a soon to be Electrical Engineering student, I figured getting a head start with the things I want to study would be useful. You're one of the only channels I have found that has resources on HDL, and teach/explain it in a way that's easy to grasp. You're awesome!
Just found your channel. As I am a total FPGA noob, this video was so helpful. I have some experience designing and implementing hardware using physical 74LS series ICs (made an processor), but FPGA and verilog are new to me. I have in my struggles learned now that I am not writing a program but describing a circuit thanks to your help. Best wishes!
Hi Stacey - fantastic video! I'm an old electrical engineer who got my start physically breadboarding and/or gates, etc. when they only existed in chips and we used "real" wires. FPGA is a natural progression yet I struggled so much looking for content to help make the transition. As you said, the learning curve is sooo steep! And so hard to "ease in" to this. You have to start out with basically everything from design to testbench to constraint files...each complex, with their own nuances and seemingly 100's of ways to mess up! Even the Amazon highly recommended book I got seemed to jump all over the place and assume a great deal of background knowledge. I had to re-read sections over and over just to understand what the author was trying to say. (Readler's "Verilog By Example" is wonderful, but only a tiny subset of what you need to actually program an FPGA - back to my earlier comment.) How I wish you had done this video a year ago - would have saved me many hours of frustration! Thanks so much and please keep it up!
Wow, thanks for the video. The last time I did logic gates (using ICs) and Karnaugh maps was the mid-1990s while studying electrical and electronic engineering. Good times.
Stacey. Awesome . . . simply Awesome. I would love to have you as a live classroom teacher or tutor. So many FPGA sources suffer from "the curse of knowledge". They do not seem to realize that their knowledge background is much more advanced than my knowledge background. Ahem . . . you might mention at the beginning that a background in digital logic gates and binary logic / boolean algebra would be most helpful for the completely uninitiated. Internet handshake. Internet hug. (gratitude hug - NOT flirting) John M.
Good that you made this video, FPGA has a hurdle in the beginning, and beginners tutorials are not abundant… Thanks, 👍😊 BTW, love how you communicate with Verilog, like it is a cat or something…👍😊
Wow! Congratulations for posting your first video, and thanks for your teaching! I hope you can continue and make this a series. ^ ^ Also, thank you for introducing us to HDLbits. It looks like a great way to practice! Just a question, is there a way to calculate square roots on non-square numbers? VHDL has an iEEE library, but still couldn't find one for Verilog. Is there an easy way?
Thanks for the feedback. There is a way to calculate square roots using a CORDIC (en.wikipedia.org/wiki/CORDIC ). It depends on the vendor, but both xilinx and Intel(altera) have CORDIC ip that you can use, they usually generate both VHDL and verilog (you can mix and match too, usually tools will allow a mix of both languages). They generally are not efficient and pretty bulky both in terms of space on the FPGA and computation time, so I usually try to offload any divide/square root operations off to a microcontroller if possible.
Thank you very much for this helpful video Please, I try to write the following Verilog code in Vivado, the synthesis process is OK but when I want to implement it an error signal appear !! module Tog_not (hsync, EOL, q); input hsync, EOL; output reg q; always @ (posedge hsync) begin q
Hi Stacey, I'm aim to become an engineer working in the chip design industry, what Xilinx/Alterta board should I buy to learn?, my budget is under 150$.
@@FPGAsforBeginners Between 150$ and 200$. I'm now considering DE-10 Lite & Basys 3 Artix-7 (both have VGA port). What is better for learning? Thank you.
Text on the screen is far too small. I can't read it on my screen at all. There's also far too much wasted space around the screen. The variable name one (which I found after taking a screenshot and zooming in), is non-descriptive and confusing. Being unable to see it, I assumed you were talking about the number 1.
Dear Sir Thank you very much for your helpful videos. I am a beginner in Verilog programming language, I have a zybo_zc_10 board. Please, I want to display a real-time video signal through this board. Do you have any valuable tutorials that could guide me to start this project? Thanks, again.
I'm not 100% sure what you mean. If you mean a dedicated module that's just an AND gate, then that's a fun exercise to build for a beginner, but not something you need to do later on. If you mean incorporating "if" statements combined with "and" conditions in your code at a larger scale, than sure, that's fine! Preferred even! At the end of the day the RTL circuit that is generated by the synthesis tool should be the same either way. I recommend coding the way you think about it. If you think of it in terms of "if" conditionals, then code it that way. I will only add that I recommend covering all cases. an "if" statement should generally have an "else" with it. If you don't, you can create an inferred latch in some cases, which can cause trouble.
@@FPGAsforBeginners yeah , I know it's very critical for one to understand that latches could be inferred In combinational circuits more easily.👍🏼👍🏼👍🏼hope to see you covering more about verilog concepts and some good techniques of writing efficient code for beginners and for experts as well.
Hey sir / mam I name is lucky I need help regarding my work on a project on which i am working i don't know to to write a code of path planning in v hdl will u pls help me in this
Hi Stacey, thanks for the video, I wanted to know how do I start learning VHDL or Verilog? I have studied digital systems, and done some basics of VHDL coding. But how do I become good enough to get a job ? Can you please tell about this
Hi Stacy! As a professional, how do you feel about the use of gate primatives over assign statements with binary expressions? Are primatives too fancy?
Hi Kasey! I'd say that for a beginner primitives are not something to worry about. The synthesis tool will automatically infer primitives as it sees fit. Synthesis tools are highly efficient and generally good at choosing when to use what. For intermediate and advanced users, there are times where it may be necessary to instantiate primitives explicitly if the designer has a specific RTL implementation in mind, but even then, usually one can predict what primitives will be inferred by the tool just based on the code, and you don't even need to explicitly instantiate them. I've used them perhaps a handful of times in my career, and almost all of those times were using older tools that weren't as good at inferring them. With the latest tools I hardly ever need to.
@@FPGAsforBeginners Thank you for your response! When coding combinational logic circuits I prefer using primatives so that I can think of the circuit visually. I don't see many people using them.
@@fpga-all-day I don't think it's that common, but if it works for you and that's the way you think about combinitorial logic then there's nothing wrong with that! I always recommend to code how you think!
Hi everyone, Thanks for all the feedback! I'm hoping to make some more videos like this one. To this end, I've made a google form to find out more of what you want to see! It's a handful of questions, all optional. Thanks again! forms.gle/ssNwzTKiioj3RNHD9
Also, I know I ramble in this one quite a bit. It was my first video and I didn't know what I was doing! My newer ones are more concise. My goal is to cram as much information into as small of a time as possible! Appreciate you all!
Keeping it simple and clear is the best advice ever. It often allows the synthesis tools to do a better job too!
Hey Stacey, this was really good! I hope you'll post more videos!
Thanks!
Thanks for suggesting HDLbits! I've been picking up Verilog in a haphazard way for years, I'm just working through the whole thing now just to clean up and tidy up my knowledge. Thanks!
You are a wonderful presenter and I love your youtube channel! I'm only starting to get into FPGA's, as a soon to be Electrical Engineering student, I figured getting a head start with the things I want to study would be useful. You're one of the only channels I have found that has resources on HDL, and teach/explain it in a way that's easy to grasp. You're awesome!
Just found your channel. As I am a total FPGA noob, this video was so helpful. I have some experience designing and implementing hardware using physical 74LS series ICs (made an processor), but FPGA and verilog are new to me. I have in my struggles learned now that I am not writing a program but describing a circuit thanks to your help. Best wishes!
I will be watching every one of your videos in a timely manner. Thank you for the great content!
Thanks for your support!
Hi Stacey - fantastic video! I'm an old electrical engineer who got my start physically breadboarding and/or gates, etc. when they only existed in chips and we used "real" wires. FPGA is a natural progression yet I struggled so much looking for content to help make the transition. As you said, the learning curve is sooo steep! And so hard to "ease in" to this. You have to start out with basically everything from design to testbench to constraint files...each complex, with their own nuances and seemingly 100's of ways to mess up! Even the Amazon highly recommended book I got seemed to jump all over the place and assume a great deal of background knowledge. I had to re-read sections over and over just to understand what the author was trying to say. (Readler's "Verilog By Example" is wonderful, but only a tiny subset of what you need to actually program an FPGA - back to my earlier comment.) How I wish you had done this video a year ago - would have saved me many hours of frustration! Thanks so much and please keep it up!
Thanks for showing this webpage, and that you provided an actual link to it. It was very easy to get started and get hands on.
I just discovered your channel and looking forward to watching all the videos! Thanks for the awesome tutorials
Thank you so much Stacey! I come from an analog electronics background, and found this very useful. Please keep the videos up!
That was great! Looking forward to watching the rest of your videos 😊
Very nice! You can also see the RTL schematic in Vivado
Thanks Stacey. I've been working with FPGAs on and off from the 1990s and I find your approach very informative.
Wow, thanks for the video. The last time I did logic gates (using ICs) and Karnaugh maps was the mid-1990s while studying electrical and electronic engineering. Good times.
HDL bits is sweet, and I thought you presented everything very well. I will be look for more of your videos.
Thanks! Great!
Thanks for the feedback!
I got new Job as hardware designer but never done any FPGA, thanks god I found your channel :)), cause my senior doesnt look so nice :P
Great job, I'll wait your next video
This is awesome, thanks a lot Stacey!!
Thanks!
Congratulations on the first video. Would be very useful for beginners
Thanks!
This is great! Thanks, Stacey!
Subscribed !
That was a Nice and Simple presentation !!!!!!
Thanks maam for such amazing explaination..love from india>>
Great advice! thank you
Hi Stacey, thanks for making these videos, they are very helpful! I really hope you keep making youtube videos.
Stacey. Awesome . . . simply Awesome. I would love to have you as a live classroom teacher or tutor. So many FPGA sources suffer from "the curse of knowledge". They do not seem to realize that their knowledge background is much more advanced than my knowledge background. Ahem . . . you might mention at the beginning that a background in digital logic gates and binary logic / boolean algebra would be most helpful for the completely uninitiated. Internet handshake. Internet hug. (gratitude hug - NOT flirting) John M.
Great video, thank you!!
Best advice : keep it simple
Good that you made this video, FPGA has a hurdle in the beginning, and beginners tutorials are not abundant… Thanks, 👍😊 BTW, love how you communicate with Verilog, like it is a cat or something…👍😊
Great video I'm just starting out with FPGA chips so this is a real help 😊
Where have You been my whole life?! Like and subscribe
Hi ! Your channel is amazing! Keep up the good work :)
Hey Stacey, this is really great stuff! loved it, and i hope i can get a lot out of this channel.
Good video tutorial ❤ thank you
Love this thanks for sharing
Excellent video! Keep up the awesome work.
Explanations are really good!
Your video is great, hope you post more video about hardware engineer
Hey ma'am you did really well. Certainly the best way to explain. Thanks
Great video! Thanks for the tips!
Wow! Congratulations for posting your first video, and thanks for your teaching! I hope you can continue and make this a series. ^ ^ Also, thank you for introducing us to HDLbits. It looks like a great way to practice!
Just a question, is there a way to calculate square roots on non-square numbers? VHDL has an iEEE library, but still couldn't find one for Verilog. Is there an easy way?
Thanks for the feedback. There is a way to calculate square roots using a CORDIC (en.wikipedia.org/wiki/CORDIC ). It depends on the vendor, but both xilinx and Intel(altera) have CORDIC ip that you can use, they usually generate both VHDL and verilog (you can mix and match too, usually tools will allow a mix of both languages). They generally are not efficient and pretty bulky both in terms of space on the FPGA and computation time, so I usually try to offload any divide/square root operations off to a microcontroller if possible.
@@FPGAsforBeginners Thank you for the help!
Great video ... looking for more great and useful videos :)
great vid, thanks
good job. I know VHDL and am trying to learn Verilog.
Great work!
This was super useful!
Amazing!
Thanks!
Great video :)
Go Stacey!
Can you make processor design playlist from the scratch?
Thank you very much for this helpful video
Please, I try to write the following Verilog code in Vivado, the synthesis process is OK but when I want to implement it an error signal appear !!
module Tog_not (hsync, EOL, q);
input hsync, EOL;
output reg q;
always @ (posedge hsync)
begin
q
I wish i could come and live around you because i'm into this so much
Cool
Hello ma'am, the website is not responding ...... please help!!
Hard to see code on the monitor, can you make background dark.
Hypothetically speaking, how would we re-design the and gate, or any other gate in a way that it deals with inequal input sizes for inputs A and B?
Hi Stacey, I'm aim to become an engineer working in the chip design industry, what Xilinx/Alterta board should I buy to learn?, my budget is under 150$.
Digilent has several options within your budget (depending on shipping costs) ArtyS7 and CoraZ7 both < 150$. Xilinx is a better choice.
@@FPGAsforBeginners
Between 150$ and 200$. I'm now considering DE-10 Lite & Basys 3 Artix-7 (both have VGA port). What is better for learning?
Thank you.
@@nantes9807I'd say Basys 3 Artix-7. There are tons of examples out there if you google "Basys 3 example projects" to get you started.
Text on the screen is far too small. I can't read it on my screen at all.
There's also far too much wasted space around the screen.
The variable name one (which I found after taking a screenshot and zooming in), is non-descriptive and confusing. Being unable to see it, I assumed you were talking about the number 1.
Dear Sir
Thank you very much for your helpful videos.
I am a beginner in Verilog programming language, I have a zybo_zc_10 board. Please, I want to display a real-time video signal through this board. Do you have any valuable tutorials that could guide me to start this project?
Thanks, again.
Hi Stacey. I started using HDLbits two days ago. Now the website isn’t working. Do you know any alternatives that are similar to this?
It seems it's temporarily down. There's chipdev.io/ as well, and makerchip.com/sandbox/
@@FPGAsforBeginners Thank you so much Stacey.
Is it good practice to write code at behavioral level, like designing AND gate using if/else statements?
I'm not 100% sure what you mean. If you mean a dedicated module that's just an AND gate, then that's a fun exercise to build for a beginner, but not something you need to do later on.
If you mean incorporating "if" statements combined with "and" conditions in your code at a larger scale, than sure, that's fine! Preferred even! At the end of the day the RTL circuit that is generated by the synthesis tool should be the same either way. I recommend coding the way you think about it. If you think of it in terms of "if" conditionals, then code it that way.
I will only add that I recommend covering all cases. an "if" statement should generally have an "else" with it. If you don't, you can create an inferred latch in some cases, which can cause trouble.
@@FPGAsforBeginners yeah , I know it's very critical for one to understand that latches could be inferred In combinational circuits more easily.👍🏼👍🏼👍🏼hope to see you covering more about verilog concepts and some good techniques of writing efficient code for beginners and for experts as well.
Hey sir / mam
I name is lucky
I need help regarding my work on a project on which i am working i don't know to to write a code of path planning in v hdl will u pls help me in this
Hi Stacey, thanks for the video, I wanted to know how do I start learning VHDL or Verilog? I have studied digital systems, and done some basics of VHDL coding. But how do I become good enough to get a job ? Can you please tell about this
Hi Stacy! As a professional, how do you feel about the use of gate primatives over assign statements with binary expressions? Are primatives too fancy?
Hi Kasey! I'd say that for a beginner primitives are not something to worry about. The synthesis tool will automatically infer primitives as it sees fit. Synthesis tools are highly efficient and generally good at choosing when to use what. For intermediate and advanced users, there are times where it may be necessary to instantiate primitives explicitly if the designer has a specific RTL implementation in mind, but even then, usually one can predict what primitives will be inferred by the tool just based on the code, and you don't even need to explicitly instantiate them. I've used them perhaps a handful of times in my career, and almost all of those times were using older tools that weren't as good at inferring them. With the latest tools I hardly ever need to.
@@FPGAsforBeginners Thank you for your response! When coding combinational logic circuits I prefer using primatives so that I can think of the circuit visually. I don't see many people using them.
@@fpga-all-day I don't think it's that common, but if it works for you and that's the way you think about combinitorial logic then there's nothing wrong with that! I always recommend to code how you think!
sure cool ill do that hahaha