Tips for Verilog beginners from a Professional FPGA Engineer

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  • Опубликовано: 11 дек 2024

Комментарии • 87

  • @FPGAsforBeginners
    @FPGAsforBeginners  3 года назад +20

    Hi everyone, Thanks for all the feedback! I'm hoping to make some more videos like this one. To this end, I've made a google form to find out more of what you want to see! It's a handful of questions, all optional. Thanks again! forms.gle/ssNwzTKiioj3RNHD9
    Also, I know I ramble in this one quite a bit. It was my first video and I didn't know what I was doing! My newer ones are more concise. My goal is to cram as much information into as small of a time as possible! Appreciate you all!

  • @cccmmm1234
    @cccmmm1234 Год назад +9

    Keeping it simple and clear is the best advice ever. It often allows the synthesis tools to do a better job too!

  • @JohnJohnson-dl8oq
    @JohnJohnson-dl8oq 3 года назад +21

    Hey Stacey, this was really good! I hope you'll post more videos!

  • @jasontay4704
    @jasontay4704 11 месяцев назад +1

    Thanks for suggesting HDLbits! I've been picking up Verilog in a haphazard way for years, I'm just working through the whole thing now just to clean up and tidy up my knowledge. Thanks!

  • @bulgarianicedtea7897
    @bulgarianicedtea7897 11 месяцев назад +1

    You are a wonderful presenter and I love your youtube channel! I'm only starting to get into FPGA's, as a soon to be Electrical Engineering student, I figured getting a head start with the things I want to study would be useful. You're one of the only channels I have found that has resources on HDL, and teach/explain it in a way that's easy to grasp. You're awesome!

  • @donnstewart706
    @donnstewart706 8 месяцев назад +1

    Just found your channel. As I am a total FPGA noob, this video was so helpful. I have some experience designing and implementing hardware using physical 74LS series ICs (made an processor), but FPGA and verilog are new to me. I have in my struggles learned now that I am not writing a program but describing a circuit thanks to your help. Best wishes!

  • @Obsessedwithcoding
    @Obsessedwithcoding Год назад +1

    I will be watching every one of your videos in a timely manner. Thank you for the great content!

  • @mmetzger79
    @mmetzger79 3 года назад +4

    Hi Stacey - fantastic video! I'm an old electrical engineer who got my start physically breadboarding and/or gates, etc. when they only existed in chips and we used "real" wires. FPGA is a natural progression yet I struggled so much looking for content to help make the transition. As you said, the learning curve is sooo steep! And so hard to "ease in" to this. You have to start out with basically everything from design to testbench to constraint files...each complex, with their own nuances and seemingly 100's of ways to mess up! Even the Amazon highly recommended book I got seemed to jump all over the place and assume a great deal of background knowledge. I had to re-read sections over and over just to understand what the author was trying to say. (Readler's "Verilog By Example" is wonderful, but only a tiny subset of what you need to actually program an FPGA - back to my earlier comment.) How I wish you had done this video a year ago - would have saved me many hours of frustration! Thanks so much and please keep it up!

  • @danielmagnus5239
    @danielmagnus5239 2 месяца назад

    Thanks for showing this webpage, and that you provided an actual link to it. It was very easy to get started and get hands on.

  • @johantjie
    @johantjie Год назад +1

    I just discovered your channel and looking forward to watching all the videos! Thanks for the awesome tutorials

  • @joshelijah5144
    @joshelijah5144 3 года назад +3

    Thank you so much Stacey! I come from an analog electronics background, and found this very useful. Please keep the videos up!

  • @ksbs2036
    @ksbs2036 Год назад +1

    That was great! Looking forward to watching the rest of your videos 😊

  • @FPGAPS
    @FPGAPS Месяц назад

    Very nice! You can also see the RTL schematic in Vivado

  • @cccmmm1234
    @cccmmm1234 Год назад

    Thanks Stacey. I've been working with FPGAs on and off from the 1990s and I find your approach very informative.

  • @digicinematic
    @digicinematic 5 месяцев назад

    Wow, thanks for the video. The last time I did logic gates (using ICs) and Karnaugh maps was the mid-1990s while studying electrical and electronic engineering. Good times.

  • @briancooper2737
    @briancooper2737 10 месяцев назад +1

    HDL bits is sweet, and I thought you presented everything very well. I will be look for more of your videos.

  • @tose9611
    @tose9611 3 года назад +5

    Thanks! Great!

  • @Maj_venture
    @Maj_venture 7 месяцев назад +1

    I got new Job as hardware designer but never done any FPGA, thanks god I found your channel :)), cause my senior doesnt look so nice :P

  • @IzharDhiyaUlHayyan-ok6yf
    @IzharDhiyaUlHayyan-ok6yf 3 года назад +1

    Great job, I'll wait your next video

  • @AlejandroHernandez-xi4vl
    @AlejandroHernandez-xi4vl 3 года назад +4

    This is awesome, thanks a lot Stacey!!

  • @AbarajithanGnaneswaran
    @AbarajithanGnaneswaran 3 года назад +2

    Congratulations on the first video. Would be very useful for beginners

  • @10e999
    @10e999 2 года назад +1

    This is great! Thanks, Stacey!
    Subscribed !

  • @Blesson_IIITMK
    @Blesson_IIITMK 10 месяцев назад +1

    That was a Nice and Simple presentation !!!!!!

  • @SOMYAGUPTA-jz9qr
    @SOMYAGUPTA-jz9qr 5 месяцев назад +1

    Thanks maam for such amazing explaination..love from india>>

  • @MechaCat123
    @MechaCat123 Год назад +1

    Great advice! thank you

  • @darkdante2k4
    @darkdante2k4 2 года назад

    Hi Stacey, thanks for making these videos, they are very helpful! I really hope you keep making youtube videos.

  • @johnmartin1024
    @johnmartin1024 Год назад +1

    Stacey. Awesome . . . simply Awesome. I would love to have you as a live classroom teacher or tutor. So many FPGA sources suffer from "the curse of knowledge". They do not seem to realize that their knowledge background is much more advanced than my knowledge background. Ahem . . . you might mention at the beginning that a background in digital logic gates and binary logic / boolean algebra would be most helpful for the completely uninitiated. Internet handshake. Internet hug. (gratitude hug - NOT flirting) John M.

  • @ZenoTasedro
    @ZenoTasedro 2 года назад +1

    Great video, thank you!!

  • @maninderpalsingh9097
    @maninderpalsingh9097 2 года назад +2

    Best advice : keep it simple

  • @bertkoerts3991
    @bertkoerts3991 10 месяцев назад

    Good that you made this video, FPGA has a hurdle in the beginning, and beginners tutorials are not abundant… Thanks, 👍😊 BTW, love how you communicate with Verilog, like it is a cat or something…👍😊

  • @3dmaxuser
    @3dmaxuser Год назад +1

    Great video I'm just starting out with FPGA chips so this is a real help 😊

  • @bartibv
    @bartibv 6 месяцев назад +1

    Where have You been my whole life?! Like and subscribe

  • @harrydobbs4179
    @harrydobbs4179 2 года назад

    Hi ! Your channel is amazing! Keep up the good work :)

  • @adithyadevmattada810
    @adithyadevmattada810 2 года назад

    Hey Stacey, this is really great stuff! loved it, and i hope i can get a lot out of this channel.

  • @BeMuslimOnly
    @BeMuslimOnly Год назад +1

    Good video tutorial ❤ thank you

  • @VeLawrence
    @VeLawrence Год назад +1

    Love this thanks for sharing

  • @coding_and_things
    @coding_and_things 2 года назад

    Excellent video! Keep up the awesome work.

  • @rovshansharifli7760
    @rovshansharifli7760 2 года назад

    Explanations are really good!

  • @hant226
    @hant226 3 года назад

    Your video is great, hope you post more video about hardware engineer

  • @PawanKumar-pn9gi
    @PawanKumar-pn9gi 3 года назад

    Hey ma'am you did really well. Certainly the best way to explain. Thanks

  • @SteveAcomb
    @SteveAcomb 2 года назад

    Great video! Thanks for the tips!

  • @yensteel
    @yensteel 3 года назад +4

    Wow! Congratulations for posting your first video, and thanks for your teaching! I hope you can continue and make this a series. ^ ^ Also, thank you for introducing us to HDLbits. It looks like a great way to practice!
    Just a question, is there a way to calculate square roots on non-square numbers? VHDL has an iEEE library, but still couldn't find one for Verilog. Is there an easy way?

    • @FPGAsforBeginners
      @FPGAsforBeginners  3 года назад +2

      Thanks for the feedback. There is a way to calculate square roots using a CORDIC (en.wikipedia.org/wiki/CORDIC ). It depends on the vendor, but both xilinx and Intel(altera) have CORDIC ip that you can use, they usually generate both VHDL and verilog (you can mix and match too, usually tools will allow a mix of both languages). They generally are not efficient and pretty bulky both in terms of space on the FPGA and computation time, so I usually try to offload any divide/square root operations off to a microcontroller if possible.

    • @yensteel
      @yensteel 3 года назад

      @@FPGAsforBeginners Thank you for the help!

  • @jcd2diablo100
    @jcd2diablo100 3 года назад

    Great video ... looking for more great and useful videos :)

  • @rwasher320
    @rwasher320 2 года назад

    great vid, thanks

  • @AkbarRajaei
    @AkbarRajaei 3 года назад

    good job. I know VHDL and am trying to learn Verilog.

  • @communicationskills1888
    @communicationskills1888 3 года назад

    Great work!

  • @placeholder5982
    @placeholder5982 3 года назад

    This was super useful!

  • @looselief
    @looselief 3 года назад +1

    Amazing!

  • @flip4119
    @flip4119 2 года назад

    Great video :)

  • @markchristophergemzon1052
    @markchristophergemzon1052 3 года назад

    Go Stacey!

  • @mujeevkhan7298
    @mujeevkhan7298 Год назад

    Can you make processor design playlist from the scratch?

  • @marwanal-yoonus280
    @marwanal-yoonus280 Год назад

    Thank you very much for this helpful video
    Please, I try to write the following Verilog code in Vivado, the synthesis process is OK but when I want to implement it an error signal appear !!
    module Tog_not (hsync, EOL, q);
    input hsync, EOL;
    output reg q;
    always @ (posedge hsync)
    begin
    q

  • @tieflabs
    @tieflabs 4 месяца назад +1

    I wish i could come and live around you because i'm into this so much

  • @rylendy5230
    @rylendy5230 2 года назад +1

    Cool

  • @sanjivvinodkumar740
    @sanjivvinodkumar740 4 месяца назад

    Hello ma'am, the website is not responding ...... please help!!

  • @alexeigoun
    @alexeigoun Год назад

    Hard to see code on the monitor, can you make background dark.

  • @yungbanz4635
    @yungbanz4635 2 года назад

    Hypothetically speaking, how would we re-design the and gate, or any other gate in a way that it deals with inequal input sizes for inputs A and B?

  • @nantes9807
    @nantes9807 Год назад +1

    Hi Stacey, I'm aim to become an engineer working in the chip design industry, what Xilinx/Alterta board should I buy to learn?, my budget is under 150$.

    • @FPGAsforBeginners
      @FPGAsforBeginners  Год назад +1

      Digilent has several options within your budget (depending on shipping costs) ArtyS7 and CoraZ7 both < 150$. Xilinx is a better choice.

    • @nantes9807
      @nantes9807 Год назад +1

      ​@@FPGAsforBeginners
      Between 150$ and 200$. I'm now considering DE-10 Lite & Basys 3 Artix-7 (both have VGA port). What is better for learning?
      Thank you.

    • @FPGAsforBeginners
      @FPGAsforBeginners  Год назад +2

      @@nantes9807I'd say Basys 3 Artix-7. There are tons of examples out there if you google "Basys 3 example projects" to get you started.

  • @robinhodson9890
    @robinhodson9890 2 года назад

    Text on the screen is far too small. I can't read it on my screen at all.
    There's also far too much wasted space around the screen.
    The variable name one (which I found after taking a screenshot and zooming in), is non-descriptive and confusing. Being unable to see it, I assumed you were talking about the number 1.

  • @مروانعبدالخالقذنون

    Dear Sir
    Thank you very much for your helpful videos.
    I am a beginner in Verilog programming language, I have a zybo_zc_10 board. Please, I want to display a real-time video signal through this board. Do you have any valuable tutorials that could guide me to start this project?
    Thanks, again.

  • @priyadarshanish
    @priyadarshanish 2 года назад +1

    Hi Stacey. I started using HDLbits two days ago. Now the website isn’t working. Do you know any alternatives that are similar to this?

    • @FPGAsforBeginners
      @FPGAsforBeginners  2 года назад +1

      It seems it's temporarily down. There's chipdev.io/ as well, and makerchip.com/sandbox/

    • @priyadarshanish
      @priyadarshanish 2 года назад

      @@FPGAsforBeginners Thank you so much Stacey.

  • @jogeshsingh854
    @jogeshsingh854 3 года назад +1

    Is it good practice to write code at behavioral level, like designing AND gate using if/else statements?

    • @FPGAsforBeginners
      @FPGAsforBeginners  3 года назад +1

      I'm not 100% sure what you mean. If you mean a dedicated module that's just an AND gate, then that's a fun exercise to build for a beginner, but not something you need to do later on.
      If you mean incorporating "if" statements combined with "and" conditions in your code at a larger scale, than sure, that's fine! Preferred even! At the end of the day the RTL circuit that is generated by the synthesis tool should be the same either way. I recommend coding the way you think about it. If you think of it in terms of "if" conditionals, then code it that way.
      I will only add that I recommend covering all cases. an "if" statement should generally have an "else" with it. If you don't, you can create an inferred latch in some cases, which can cause trouble.

    • @jogeshsingh854
      @jogeshsingh854 3 года назад

      @@FPGAsforBeginners yeah , I know it's very critical for one to understand that latches could be inferred In combinational circuits more easily.👍🏼👍🏼👍🏼hope to see you covering more about verilog concepts and some good techniques of writing efficient code for beginners and for experts as well.

  • @LUCKYLUCKY-rs5ps
    @LUCKYLUCKY-rs5ps Год назад

    Hey sir / mam
    I name is lucky
    I need help regarding my work on a project on which i am working i don't know to to write a code of path planning in v hdl will u pls help me in this

  • @ravirajchilka
    @ravirajchilka Год назад

    Hi Stacey, thanks for the video, I wanted to know how do I start learning VHDL or Verilog? I have studied digital systems, and done some basics of VHDL coding. But how do I become good enough to get a job ? Can you please tell about this

  • @fpga-all-day
    @fpga-all-day 3 года назад +1

    Hi Stacy! As a professional, how do you feel about the use of gate primatives over assign statements with binary expressions? Are primatives too fancy?

    • @FPGAsforBeginners
      @FPGAsforBeginners  3 года назад +2

      Hi Kasey! I'd say that for a beginner primitives are not something to worry about. The synthesis tool will automatically infer primitives as it sees fit. Synthesis tools are highly efficient and generally good at choosing when to use what. For intermediate and advanced users, there are times where it may be necessary to instantiate primitives explicitly if the designer has a specific RTL implementation in mind, but even then, usually one can predict what primitives will be inferred by the tool just based on the code, and you don't even need to explicitly instantiate them. I've used them perhaps a handful of times in my career, and almost all of those times were using older tools that weren't as good at inferring them. With the latest tools I hardly ever need to.

    • @fpga-all-day
      @fpga-all-day 3 года назад

      @@FPGAsforBeginners Thank you for your response! When coding combinational logic circuits I prefer using primatives so that I can think of the circuit visually. I don't see many people using them.

    • @FPGAsforBeginners
      @FPGAsforBeginners  3 года назад +1

      @@fpga-all-day I don't think it's that common, but if it works for you and that's the way you think about combinitorial logic then there's nothing wrong with that! I always recommend to code how you think!

  • @ΝικΝοκ
    @ΝικΝοκ Год назад

    sure cool ill do that hahaha