Successive Approximation type ADC

Successive Approximation type ADC
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Lecture By: Ms. Gowthami Swarna, Tutorials Point India Private Limited

[@TutorialsPoint_]

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[@pranavpurushan3480]

Brillianty explained! Thank you Mam!

[@maharshisanandyadav]

Mam please explain TWO STEP A/D CONVERTER
Your Explanation is Simply Superb.

[@srinaath9845]

Thank you for this lecture Mam

[@subhasishchoudhury5093]

Thank you ma'am... Very easy understanding.... Ur explanation is also very nice...

[@rishabhkumar8115]

Goddess of teaching ..thank u so much!

[@maximobriggs8499]

i guess Im asking the wrong place but does anyone know a way to log back into an instagram account..?
I was stupid forgot my login password. I appreciate any tips you can give me.

[@arunsharma-ze1sl]

Finally its clear to me ,you had explained in a very simple way . Thankyou mam.

[@anithakumar7864]

U r very good in explaining... thank you

[@nayabbatool6338]

Excellent explainatuon 🙂
Jizaq ALLAH

[@binthiyagabriel7515]

Ma'am for the third clock cycle Vin becomes equal to Vd i.e. 3. How will the Op-Amp respond to this? Thank you.

[@srinureddy1584]

Super madam excellent exaplanaton to understanding the concept in easy manner. Thanks madamm

[@venkateshvenky1335]

Clear cut explaination tq 4 spending ur valuable time mam

[@gopainfree]

mind blowing explaination, had to comment to increase your engagement! thank you

[@mdhridoychowdhury8867]

I'm from Bangladesh. Thanks for your explanation. Now, it’s clear to me.

[@iqrashaikh6920]

very well explaination ... 👍 it will help me tomorrow's paper.. thnx mam 👌

[@jackdanksterdawson112]

Shaikh Insha the paper is on 3rd dude

[@manish_singh373]

@@jackdanksterdawson112 after 1 year paper is on 3rd(i.e. tomorrow)

[@usualhabitat4469]

My paper is today 😅

[@shekharrout5345]

Thank u so much mam its very very helpful....

[@mihiramadhava6729]

wow. well explained! thanks mam!

[@dr.sateeshkumarkanagala1288]

Good Question Sudheer. It is very clear that the Op-Amp is connected in open loop mode.V(-)>V(+) then vout=[-Vsat] and if V(+)>V(-) then Vout=[+Vsat]. If V(+)=V(-) then Vout=0.As the output is connected to the digital circuit one of the input is 0 Output of the digital block is 0. So, there is no impact on the already stored SAR Data.Finally, this is the finalized output.

[@neeltej4123]

pls rply to my comment.thanks.

[@mgbiradar6706]

can some one
share practical Ckt ...immdtly

[@arunkumar-cb5rf]

Very thanks mam for your class I cleared DLC easily😊.Thank you very much

[@abhinavpandey3356]

will the value of voltage is equal to no of bit

[@kothapallysandeep587]

Tq very good explanation.

[@bambibambi194]

Thank yew so much..Mam..understood very well

[@ramuravalavalasa8009]

Thank you madam Garu tq very much 👍👍👍

[@mochisailokeshbabu206]

Tq madam for explain in a underestand manner for me

[@izazahmed4701]

Thank you so much ma'am

[@shivanisharma6144]

Finally I got this .....thanku so much mam

[@le-2224]

Thank you mam..iam big fan of your classes ....

[@nikhee8]

Thanks for information 👌

[@AICSTejuM]

Tqsm for big solution and help 😊

[@nikhilchourasiya4720]

You are great mam
Nice explanation 👌👌👌👌👌👌👌👌👌👌👌
Thanks mam

[@nadeemasif2406]

Question: Let the analogue value of an input signal is 5, for reference value 1 for ADC. Considering that the ADC is 4 bits, write down at least 6 iterations to show the ADC process using successive approximation method (showing update in the binary digits of 4 bit).
Please solve

[@rockymakers4446]

Mam yah block diagram exma main likh sakte h na

[@Ramesh-cp7un]

Thank you mam .... Very clear explanation and kindly give some important notes mam....

[@jushas9276]

perfect explaination....clearly understood.....tq

[@makhansadeep6158]

But hum digital value find kese kare ? humko pata kese chalenga ki value digital me kya he?

[@balakondaiahpanchakatla1376]

Thank you so much mam

[@NitishKumar-fl3xq]

If I am giving Vin as 6v,then only one clock pulse if enough.
So can I say that for 3 bit o/p digital data , maximum clock pulse required is 3?

[@akileshgokulakrishnan9658]

Nitish Kumar clocks required is independent of the input voltage

[@circuitsanalytica4348]

If it is n bit, it requires n click cycle, if n=3, it will give output at the end of 3rd clock pulse...

[@Vilvaran]

A great explanation from a very pretty lady; my introduction to S.A. type ADCs could not have been more genuine :)

[@user-vt3qf8og9i]

Madam... monostable multivibrator using ic 555 time...plz explain madam...

[@tapsisingh6276]

Very nice explanation ma'am 🙏😇

[@D_Comrade]

Thank you Madam🙏🙏. Lvu u❣️

[@ABHYASKUMARSHOLE]

Please mam provide PDF of each lecture .

[@lifememories10]

Thank you Mam..
❤❤from Nepal

[@hrithikbal8086]

Thanks mam you are the best

[@manishchetiwal1811]

Thanks a lot Ma'am.

[@fakhraabid423]

Bht bht acha explain kia.ap ne

[@bruhbruh4137]

So clear ma'am thank you

[@Diploma_tech2408]

Superb explanation

[@adfar_banday123]

May God bless u😊❤❤❤🎉🎉🎉

[@mgbiradar6706]

can some share practical Ckt ...immdtly

[@RohitKumar-zp6ci]

How to find vd?

[@alishashehzad4008]

Explained very well 👌👍

[@mynepal5119]

G हो च, हो जब हो गगन जब हो गगन हो गगन हो गगन हो जब हो जब हो जब हो गगन हो वच चह चहच हो जब हो गगन, चच हो च हो ,वहचच ,च,चच हच,जिसीसी ग,वचवव वच च

[@mgbiradar6706]

can some one
share practical Ckt ...immdtly

[@Peaceful05578]

Really helpful.. Thankyou mam

[@user-xi4vg7sf8i]

Nice explaination

[@bhupendrateriya7630]

Thanks

[@pathaneshakhkhan6557]

Tq so much madam

[@muralikrishnareddy4609]

Nice lecture mam
Thank you

[@mgbiradar6706]

can some share practical Ckt ...immdtly

[@dikshitadesai]

Helpful...Thanks

[@ranjanasalunke9839]

Very nice explanation mam please explain... DAC

[@aiswaryajustin2728]

thanks😊

[@ankushrainaofficial]

thankss mamm

[@Rakhi1888-h8p]

Thanku so much mam🙏♥️

[@melwyndsouza9220]

There was a very good effort put in. I could understand as I am from India, but living in Ireland I can tell you that the poor language fluency might affect the number of viewers as it might entirely change the meaning of the sentence. For example, she said 'Three-bit data, searched all Eight-bits' @ 12:50 which makes no sense. I understand that she meant 'All the 8 combinations of 3-bit data were verified' but not everyone is going to understand. I have been following TutorialsPoint website for a long time and this is my honest feedback.

[@circuitsanalytica4348]

You are right Melwyn....

[@madhuriprajapati61098]

Great explanation

[@mathan804]

Nice explanation

[@kuldeepsinghal2082]

Mam if vin is 2volt then ans not came pls try

[@piyupatel3725]

Very Good explain mam 👌

[@arfatshaikh4669]

Nice explanation mam😊

[@user-py9zt4vh6d]

Thank you maam

[@prityrajsingh6727]

Thankyou ma'an

[@sonusolanki3689]

Tq so much mem ❤️❤️

[@maheedharkukati9606]

Good explantion

[@palasubash838]

What is msb

[@VikasThakur-sk2ee]

Simple explanation ❤❤❤

[@chinnilakshminarendra8123]

Thanks mam

[@sudheerkumarsomarouthu8101]

What the result when they are equal

[@radhakrishnan8343]

the previous result will be adopted. If 0 then it'll be 0, if 1 it'll get 1

[@circuitsanalytica4348]

If it is equal, then the bit which was set previously, that will be retained, if vin less than vdac, then the bit will be reset....

[@gayatribarhate5137]

ty mam i understood everything but what if vin = vd ?? plz someone reply

[@sahethi7190]

When DAC output matches the analog signal, the input of DAC is equivalent digital signal.

[@abhinavpandey3356]

ur doubt is valid i guess n i think its being defined in algorithm that vin=vd we get digital output

[@sushanthraju3215]

take it as 0

[@circuitsanalytica4348]

If Vin = Vd, bit which was set last will be retained and next bit will be set during next clock cycle and I will make a video especially on this..

[@NitishKumar-sp6pl]

Brilliant mam🙏👌👌👌

[@Geethureethu]

Really good mam

[@NehaKumari-xq7kr]

Ma'am I have a doubt .
When V(DAC)= V(In)
Then what should I do

[@subashpalanivel8476]

Same doubt

[@malikyawarshafi1641]

Then it will act as a memory obviously. It will process the previous data itself.

[@priyanshuguptaanshu5224]

Thanku mam

[@muhammadammararif6854]

Salute u mam.

[@vineethkumarsiriyala3944]

Ur words are not visible of clarity but teaching is soo excellent

[@patelpatel8287]

Very clear mam🤗

[@everythingwithme5121]

Didi you are best

[@mgbiradar6706]

theory is Good ..
Kindly share Practical Ckt..

[@nikhee8]

Tq

[@adfar_banday123]

Always valuablr

[@vinodps1978]

Good..

[@ranjjuroy6283]

Mam if vin equal to vd then what happen

[@circuitsanalytica4348]

The bit which was set in the previous clock cycle will be retained and next bit will be set....

[@adityasadaphule2187]

I understood this sarcute..!

[@Surakshanmovies]

5:22 😂😂

[@SONUAGGARWAL]

Your resolution depend on its dac module basically.. playing with it , you can increase it too.. 😉, (saying as designer)

[@grimgoreironhide9985]

Your resolution really depends on the SAR Logic Circuit. The DAC is the easiest part.

[@anishmanandhar1203]

watching this before few hours of exam

[@ayushinahar8142]

Mam what if when Vin is equal to Vd

[@balasubrahmanyamp6406]

We get the v in value in digital form

[@circuitsanalytica4348]

If Vin equal to Vd, the that bit which was set during last clock cycle will be retained and next significant bit will be set....

[@vigneshagamers8988]

at 9.20 it is wrong
madam

[@chaitucherry879]

Mam please explain pipelined adc concept as early as possible

[@chefswag42]

i learn more from youtube videos made by indians than i do from school

[@negamilikit6525]

good clssas

[@sreenivasulareddy7328]

Very good

[@mgbiradar6706]

can some one
share practical Ckt ...immdtly