Design of 4 to 1 Mux using CMOS logic || Schematic diagram || Explore the way

Design of 4 to 1 Multiplexer using CMOS logic.

[@Fpg-x2s]

Good clarification. Thanks.
Gopal raju

[@bardia6676]

Hi
Thanks for your great video
Can you design the circuit with less number of mosfets?
It will be great if you explain the method

[@bethapudisaichandrika5104]

12+12+ 2 u have taken only 26 transistors right

[@mssujatha9566]

2 inverters are required to generate s0' and s1'. That means another 4 transistors. Total: 4+12+12+2=30.

[@trannhattan7703]

Hey Admin, video is nice. I have any trouble, I dont undersatnd 12 tran 12 tran of Pmos and Nmos, 2 tran of not gate. So 4 trans other of what ?
I guess it of 4 not gate S01 right ?

[@ExploretheWAY]

Hi.. two not gates are required to generate s1' and s0'. So, the other 4 transistors. Hope, it clears your doubt.

[@trannhattan7703]

@@ExploretheWAY I was clear my trouble. Thank you
Do you have the tutorial of the 4 to1 Mux Stick Diagrams ?
I was try draw it, but I realy realy dont understand have 2 s0, 2 s1 and 2 bar S1 in the Pmos of the Stick Diagrams :))
Help me, pl ^^

[@fatimasheraz8235]

@@ExploretheWAY plz help

[@snehashis_biswas]

@@ExploretheWAY I did not understand madam, please explain. (if possible describe)

[@prasanthksl7398]

@@trannhattan7703 hello, did you make it?

[@Sameer.Trivedi]

Thankyou Mam! Great Video

[@z9ze]

+why use inverter in output, ?

[@ExploretheWAY]

The CMOS logic produces complemented function. To get true output, one inverter is required at the output.

[@sureshyedlapalli9938]

👍

[@rashmi5041]

Thank u,🥰

[@z9ze]

This not 30Tr, only 26

[@ExploretheWAY]

Two inverters are used produce s0' and s1'.