- Видео 40
- Просмотров 404 836
Jay Brockman
Добавлен 23 сен 2013
Flip Flops and Clocks with Verilog in Quartus/Terasic DE2-115
Design and simulation of a flip flop in Verilog using Intel Quartus for the Terasic DE2-115 board. Includes writing a Verilog testbench. Prepared by teaching assistant Tyler Kehne for University of Notre Dame CSE 20221 Digital Logic Design.
Просмотров: 6 372
Видео
Flip Flops
Просмотров 2,7 тыс.6 лет назад
Basic design and operation of a flip flop. Uses online simulator from falstad.com/circuit
Intel Quartus: Programming an Altera DE2 115 FPGA Board
Просмотров 16 тыс.6 лет назад
Prepared for University CSE 20221 Digital Logic Design by teaching assistant Tyler Kehne.
Intel Quartus: Errors in ModelSim
Просмотров 12 тыс.6 лет назад
Prepared for University CSE 20221 Digital Logic Design by teaching assistant Tyler Kehne.
Intel Quartus: The System DE2 Module
Просмотров 1,9 тыс.6 лет назад
Prepared for University CSE 20221 Digital Logic Design by teaching assistant Tyler Kehne.
Intel Quartus: Testbenches
Просмотров 3,4 тыс.6 лет назад
Prepared for University CSE 20221 Digital Logic Design by teaching assistant Tyler Kehne.
Intel Quartus: Setting Up ModelSim
Просмотров 32 тыс.6 лет назад
Prepared for University CSE 20221 Digital Logic Design by teaching assistant Tyler Kehne.
Intel Quartus: Using ModelSim
Просмотров 9 тыс.6 лет назад
Prepared for University CSE 20221 Digital Logic Design by teaching assistant Tyler Kehne.
Intel Quartus: Creating a Basic Module
Просмотров 3,2 тыс.6 лет назад
Creating a Verilog module in Quartus. Tutorial by Tyler Kehne for Notre Dame CSE 20221 Digital Logic Design.
Intel Quartus: Setting Up a Quartus Project
Просмотров 2,6 тыс.6 лет назад
Tutorial by Tyler Kehne for Notre Dame CSE 20221 Digital Logic Design.
Intel Quartus: Overview
Просмотров 2,3 тыс.6 лет назад
Overview of main Quartus windows. Tutorial by Tyler Kehne for Notre Dame CSE 20221 Digital Logic Design.
Intel Quartus: Using the RTL View
Просмотров 17 тыс.6 лет назад
Using the RTL view to see the results of synthesizing a Verilog module. Tutorial by Tyler Kehne for Notre Dame CSE 20221 Digital Logic Design.
Intel Quartus: Connecting Modules in Verilog
Просмотров 30 тыс.6 лет назад
Using wires in Verilog to connect modules. Tutorial by Tyler Kehne for Notre Dame CSE 20221 Digital Logic Design.
SR and D Latches
Просмотров 2,4 тыс.6 лет назад
Basic design and operation of an SR latch and D latch.
Decoders, Demultiplexors, and Multiplexors
Просмотров 5 тыс.6 лет назад
How decoders, demultiplexors, and multiplexors work. Example design using basic logic gates. Uses online simulator at falstad.com/circuit/
Why not use NMOS as pull-up in CMOS circuit?
Просмотров 15 тыс.6 лет назад
Why not use NMOS as pull-up in CMOS circuit?
Switch Circuits for Boolean Logic Gates
Просмотров 2,3 тыс.6 лет назад
Switch Circuits for Boolean Logic Gates
Music for Pieces of Wood on Arduino Drum Machine
Просмотров 4677 лет назад
Music for Pieces of Wood on Arduino Drum Machine
WAVES: Connecting Analysis and Design through STEM and Musical Performance
Просмотров 23710 лет назад
WAVES: Connecting Analysis and Design through STEM and Musical Performance
Designing a Laser Cut Tabbed Box Using Inkscape
Просмотров 113 тыс.11 лет назад
Designing a Laser Cut Tabbed Box Using Inkscape
thanks you very much
good explain with good time, but you did not put/show the file/code in the vhdl neighter vht.
god bless you jay brockman
"Errors encountered please check your design" :output waveforms seems to be correct but error is showing, what to do?
crystal clear. Thank you
im missing system_tb
Yo tmb we, qp
i appreciate how well explain , make it look so easy 100 percent easy to follow thanks again and God bless you
life saviour omfg thanks
what software are you using for simulations ?
thanks
Cảm ơn nhiều!
you suck dick dude you make a tutorial but don't explain how to do shit. "it should work if you set it up right" blah blah blah dick head explain how to set it up right.
6:10 In my prac lab pc, path>union is unioned only when two object selected but not more than 2 why then how you do it ??
thats it... THATS IT!
Legend Video
How can i find cyclone 2
THANK YOU SO MUCH!!!!!!!!!!!!!!!
This is super quick and accessible. Thanks a lot!
Hopefully you are stilt picking comments up and that was an excellent video and very well presented and thank you for sharing.
thx :D
Error loading design for TB
the same problem
error loading design 🤕
I have same problem
The same problem, Do you solve it???
Thanks a lot
You're a life saver mate
I've done this still can't simulate the codes can you help me with this?
Modelsim altera isn't in part of my quartus prime eda tool options
mine neither
Same here. Have you found a solution?
@@tasosketses6166 Same here. Have you found a solution?
Questa is very similar to ModelSim
you have more files on how to do modules or any book to use ??/
Thanks a lot. I appreciate.
Thank you. Great tutorial for beginners.
youre my goat
This deserves more likes, my professor, while giving precise mathematical formulas for explanation, isn’t very intuitive, this visualisation saved me valuable time
Beautiful. Now I know how to build any logic from scratch. Thank you. I love hardware. It always fascinated me as a child. How computers work on an electronic level. Mosfets were the final piece in the puzzle for me. You have completed my picture. I have a long way to go. But now I know where to go and how to get there. Thank you. Knowingly or unknowingly, you have become my Guru. You have opened my eyes. Now I can see all. Thank you!!
Thank you very mush my friend. Now I can rest in peace. You got me and Diamond a 100 for the course :)
Do names in a module inside another module always have to start with a dot? Is that the only situation where a name starts with a dot?
From how I understand it, if you are using explicit declarations, then yes. I believe it means that the value should be referenced from the original module from which the instantiation is made. For example, the ".a" above pulls in the declaration of "a" from the module "myAND" and assigns it to the input declared in the current module, "input a". I hope this makes sense!
@@gabrielladangler1722 Thanks.
Damn! This turned out so easy, thanks a lot!!
Thanks, this was very helpful!
Omg, thanks a lot man! I spent too many hours trying to solve this problem.
Which Quartus version are you using in this tutorial?
i couldnt fix it but i made a square and it overlapped, and used difference but how you did in the video doesnt work. :(
my box the red one, goes behind the blue box and when i hit difference it deletes the blue box...
This is the best explanation I've seen on RUclips.
Very clean. Thanks!
this is the best video i got since i am searching for the one video that clear my doubt
Very well explained, thank you.
I was installed it. But there are no signal at any input option even connecting headphones/microphone or talking without headphones/microphone or even playing media player and changing the input settings. Have I miss something? Why I haven't had any signal at all?
Thanks for that mate, how would you cut out holes within the object and measure the distance from the edges.
THANK YOU SOO SOOO MUCH I DONT HAVE TO READ THE WIKI PAGE ANYMORE! 💜😂
Thank you! Very nice video. You have helped a lot of people. Keep up the good work!
Awesome tutorial thank you so much - I assumed this would be so much harder but you've explained it brilliantly! I think the primary aged children I teach will be able to get their teeth into this!
I can't get this to work. Every time I drag the red piece over the blue one the tab goes behind the blue one, then the difference tool erases the blue one. I'm trying to learn Inkscape and nothing bleeping works how it does in everyone's videos. I'm getting so frustrated.