Awesome video good sir! Just an fyi for others who try to replicate the curves using the circuit shown at 17:59, the step param is 25 not 20, I couldn't tell why I wasn't getting the same curves as the professor, but ended up finding out it was that. cheers!
Wonderful Explanation Professor. Can I use the same method to calculate the film capacitor lifetime? Or it is different from the Electrolytic capacitor.
I find it a challenge to actually measure directly the capacitor ripple current in RMS. This is due to the current ripple waveform being non sinusoidal and having overtones at several different frequencies of different magnitudes and the ESR dependency on frequency. I think ideally you would take a deep memory record on a sampling oscilloscope up to about 10MHz bandwidth and then determine true RMS using the scope mathematical functions. Much like performing an FFT and working through the calculated rms. Note worthy is the fact that a DMM may have the needed crest factor for the AC RMS measurement, but perhaps not the frequency response for the higher order frequency content. After which we still need to address the ESR dependency on frequency, or make some assumptions on design margin to negate its effect. The above is interesting, but as you know, we really want to know the capacitor hotspot temperature so we can get a better estimate on capacitor useful life and the approach using power is to really understand temperature rise. So, perhaps a general rule of thumb as to the scope measured RMS coupled with actual temperature testing with a high accuracy thermal camera at different ambient temperatures (using a temperature controlled test chamber) in the actual application. Then we would have to correlate the case temperature to hot spot temperature. I know with a non solid aluminum electrolytic you can mill a hole in the top cover, using a mill which is flat and not a drill, and then insert an insulated thermocouple or RTD to about the center of the device and actually measure the hotspot temperature. Doing this without compromising the capacitor performance depends greatly on the diameter of the temperature probe. You can also remove the upper portion of the insulating jacket to get an estimate on the insulating temperature rise. The exercise as presented in the video and described above, really emphasizes the need for a prototyping stage in development. For example, you may move to a dual capacitor approach, or a bank of capacitors to get the needed useful product life. I think you will find many designs moving to a dual capacitor approach due to the benefits of ESR but also essentially spreading the heat over a larger radiating surface. There are also height advantages with multiple capacitors, and also pricing advantages if the value chosen is very popular in the market place. The pricing is really remarkable as to the cost of a high performance single capacitor (high in terms of, capacitance, operating temperature, life, ESR, etc.) and then say using a bank of four lower value and lower cost capacitors to get better performance at a lower price. I have seen high end power supplies by IBM and other computer manufacturers where there is plenty of room to put a huge can capacitor, but chose instead to have a large bank of capacitors in parallel, perhaps as much as 16 in parallel, and grouped very tightly, where you would think airflow would be a problem. However, if you look at the bank alone the surface area is so large the grouping is not an issue. If you move to a bank approach it is good to have a very common device PCB foot print spanning several different working voltages and capacitance of a particular family or manufacturer, this way you can modify the design without re-laying out the PCB because many devices use the same foot print. So, perhaps you can do a video on moving from one capacitor to two or more. We have also made the assumption that the working voltage in the presence of ripple is also under control especially if the capacitor is used in an off-line switching power supply.
Thank you for your comment, but I am afraid that you are barging into an open door. 1. The current measurement was made with a clamp-on wide bandwidth current probe connected to a wide band oscilloscope. 2. ESR dependence on frequency of the tested electrolytic capacitor is very small in the range of 40kHz to about 100kHz where most of the ripple current energy was located in the tested circuit. 3. We did use a thermal camera for temp measurements. 4. I see no point in measuring the cap temp for various ambient temp. For the given power dissipation the cap temp will follow that of the ambient. 5. I would not drill a hole in an electrolytic capacitor. This was done successfully in jambo Film capacitors.
Perhaps you could present your experimental data (video of test setup and taking of data) along with the theory so your audience can understand better your approach, especially for I RMS. It is fortunate that your spectral range for capacitor current was small and confined in your example. But, the difficulties in understanding the different frequency content seem to be overlooked when doing off-line front ends with the capacitor after a bridge at 2x the line frequency, with the added dimension that the input line waveform is usually also distorted. So, it this case your selection process and design margins are very relevant as many designs seem to get the selection of the capacitor(s) wrong. @@sambenyaakov
In example 1, I don't understand where you get the Tcmax number. I thought based on the previous slides that Tcmax comes from measuring the Irms out of the capacitor?
TCmax is the case temperature when applying the maximum ripple current (I²rms x ESR loss) when the ambient temperature of 105 °C. In the example given, the case temperature is 118°C when the ambient temperature is 105°C with the RMS ripple current applied which has been specified in the data sheet. Beware, the presentation sometimes states I² instead of I²rms. But since we are talking about resistive power losses it is almost automatically implied that any mention of I² means I²rms.
@@ganopterygon Then there would be an optimum ripple current that maximally utilises the capacitor while reducing its life to eg, 80% of its shelf life. Thinking about it more, maybe designing for a case temperature rise of 10degC above ambient would be good, because that should result in a value of 50% of its shelf life.
I always use Poly-AL type of capacitors for DC-DC switchers (input and output where needed) with low ESR types. In my market, cost is not the issue, performance is (Medical).
Very nice and most practical
Thanks Hamid
Awesome video good sir! Just an fyi for others who try to replicate the curves using the circuit shown at 17:59, the step param is 25 not 20, I couldn't tell why I wasn't getting the same curves as the professor, but ended up finding out it was that. cheers!
I could have said that I did this purposely to check alertness😊, but yes, an error. Thanks.
I was just looking for a video on this topic. This has been very useful. Many thanks.
👍🙂
Wonderful Explanation Professor. Can I use the same method to calculate the film capacitor lifetime? Or it is different from the Electrolytic capacitor.
Have you seen ruclips.net/video/gBtjcIBJ0Yc/видео.html ?
No...Thanks professor
I find it a challenge to actually measure directly the capacitor ripple current in RMS. This is due to the current ripple waveform being non sinusoidal and having overtones at several different frequencies of different magnitudes and the ESR dependency on frequency. I think ideally you would take a deep memory record on a sampling oscilloscope up to about 10MHz bandwidth and then determine true RMS using the scope mathematical functions. Much like performing an FFT and working through the calculated rms. Note worthy is the fact that a DMM may have the needed crest factor for the AC RMS measurement, but perhaps not the frequency response for the higher order frequency content. After which we still need to address the ESR dependency on frequency, or make some assumptions on design margin to negate its effect.
The above is interesting, but as you know, we really want to know the capacitor hotspot temperature so we can get a better estimate on capacitor useful life and the approach using power is to really understand temperature rise. So, perhaps a general rule of thumb as to the scope measured RMS coupled with actual temperature testing with a high accuracy thermal camera at different ambient temperatures (using a temperature controlled test chamber) in the actual application. Then we would have to correlate the case temperature to hot spot temperature. I know with a non solid aluminum electrolytic you can mill a hole in the top cover, using a mill which is flat and not a drill, and then insert an insulated thermocouple or RTD to about the center of the device and actually measure the hotspot temperature. Doing this without compromising the capacitor performance depends greatly on the diameter of the temperature probe. You can also remove the upper portion of the insulating jacket to get an estimate on the insulating temperature rise.
The exercise as presented in the video and described above, really emphasizes the need for a prototyping stage in development. For example, you may move to a dual capacitor approach, or a bank of capacitors to get the needed useful product life. I think you will find many designs moving to a dual capacitor approach due to the benefits of ESR but also essentially spreading the heat over a larger radiating surface. There are also height advantages with multiple capacitors, and also pricing advantages if the value chosen is very popular in the market place. The pricing is really remarkable as to the cost of a high performance single capacitor (high in terms of, capacitance, operating temperature, life, ESR, etc.) and then say using a bank of four lower value and lower cost capacitors to get better performance at a lower price. I have seen high end power supplies by IBM and other computer manufacturers where there is plenty of room to put a huge can capacitor, but chose instead to have a large bank of capacitors in parallel, perhaps as much as 16 in parallel, and grouped very tightly, where you would think airflow would be a problem. However, if you look at the bank alone the surface area is so large the grouping is not an issue. If you move to a bank approach it is good to have a very common device PCB foot print spanning several different working voltages and capacitance of a particular family or manufacturer, this way you can modify the design without re-laying out the PCB because many devices use the same foot print.
So, perhaps you can do a video on moving from one capacitor to two or more.
We have also made the assumption that the working voltage in the presence of ripple is also under control especially if the capacitor is used in an off-line switching power supply.
Thank you for your comment, but I am afraid that you are barging into an open door.
1. The current measurement was made with a clamp-on wide bandwidth current probe connected to a wide band oscilloscope.
2. ESR dependence on frequency of the tested electrolytic capacitor is very small in the range of 40kHz to about 100kHz where most of the ripple current energy was located in the tested circuit.
3. We did use a thermal camera for temp measurements.
4. I see no point in measuring the cap temp for various ambient temp. For the given power dissipation the cap temp will follow that of the ambient.
5. I would not drill a hole in an electrolytic capacitor. This was done successfully in jambo Film capacitors.
Perhaps you could present your experimental data (video of test setup and taking of data) along with the theory so your audience can understand better your approach, especially for I RMS. It is fortunate that your spectral range for capacitor current was small and confined in your example. But, the difficulties in understanding the different frequency content seem to be overlooked when doing off-line front ends with the capacitor after a bridge at 2x the line frequency, with the added dimension that the input line waveform is usually also distorted. So, it this case your selection process and design margins are very relevant as many designs seem to get the selection of the capacitor(s) wrong. @@sambenyaakov
In example 1, I don't understand where you get the Tcmax number. I thought based on the previous slides that Tcmax comes from measuring the Irms out of the capacitor?
To which minute, slide, are you referring?
TCmax is the case temperature when applying the maximum ripple current (I²rms x ESR loss) when the ambient temperature of 105 °C. In the example given, the case temperature is 118°C when the ambient temperature is 105°C with the RMS ripple current applied which has been specified in the data sheet. Beware, the presentation sometimes states I² instead of I²rms. But since we are talking about resistive power losses it is almost automatically implied that any mention of I² means I²rms.
Capacitors dry out after many years of even low ripple current and moderate temperatures, or is that only the dodgy cheap brands ?
All of them dry out, the difference will be the quality of the seal, the tighter and higher quality the longer will be its life
@@ganopterygon Then there would be an optimum ripple current that maximally utilises the capacitor while reducing its life to eg, 80% of its shelf life.
Thinking about it more, maybe designing for a case temperature rise of 10degC above ambient would be good, because that should result in a value of 50% of its shelf life.
Good point, I should have mentioned shelf life. Next time😊
@@ganopterygon this happen do to evaporated dielectric
I always use Poly-AL type of capacitors for DC-DC switchers (input and output where needed) with low ESR types. In my market, cost is not the issue, performance is (Medical).
Great video, thanks Professor. Could you please also do a similar video of Semiconductors as well? Like MOSFETs or ICs? Thank you.
You mean lifetime or in general?
Lifetime calculation based on mission profile of application.
@@raviteza8 Good subject. Will try.
@@raviteza8 Good subject. Will try
👍🙏❤
😊👍🙏