As for power sequencing - it's typically done by connecting "enable" pins of dc-dc converters to "power good" output of converter which is to be turned on before that. Or if you have an MCU on board for some other purposes, you can utilize it for sequencing as well. Though truth be told, many of those FPGAs work just fine if you simply enable all rails at the same time.
It will be easy peasy to make a VGA controller out of this. I've done it in a 128 macrocell CPLD (text mode only but with a hardware cursor) with a 28.322MHz oscillator. With the amount of logic in this thing you could very likely also support some graphics modes. A 4mbit RAM has enough room to store a byte per pixel for a 640x480 display (single frame buffer only), but you'll want to do some calculations to see if 15ns will be fast enough to support that kind of resolution and bit depth. DRAM is easy too. I've used some in a recent project for the first time and with a simple timer and state machine it is trivial to juggle refreshes and accesses.
My other VGA cards are running 55ns, so I hope 15ns will be plenty fast, but I guess I'll see how it goes. I've always enjoyed graphics work, so this should be fun!
@@rehsd yeah, you should be fine. I hadn't done any calculations earlier, but 25.175MHz is about 39ns per clock, so 15ns is plenty fast. 55ns RAM is probably running "out of spec" but it's really a "guaranteed worst case" and could very well just happen to work faster - think of it as over clocking. You wouldn't design a production product around it, at least not without characterising and binning parts based on real world performance rather than manufacturers specs.
I considered using an FPGA for driving a LCD via the parallel bus, but decided against it for the ESP32-S3. They're very cheap and very fast. There's also sample code for driving displays using various protocols. I also looked at the RP2040, but it has some fatal flaws. Flash memory is external only which adds to the BOM costs. Given shortage of the Raspberry PI 4, it's a bit precarious to rely on its availability.
@@TomStorey96 I "upgraded" the PCB to have 1MB of SRAM to give me a little more flexibility (e.g., higher resolution and/or two frames). imgur.com/a/L6otjom
I plan to use that exact sram chip in my build. Be sure to tell us about how it performs when you do get it working. If you're using this to test vga stuff, how are you planning on writing vram data to the ram chip? I have a olimex ice40 dev board with an sram chip but implementing some kind of pseudo spi to parallel ram system sounds like it would be extremely difficult. Maybe a textmode would work well this way.
I'll start with baby steps. 1) Generate proper sync signals, 2) Output simple test patterns that are dynamically generated (no VRAM), 3) Write some test patterns to VRAM from the FPGA and see if I can output it. If I get that far, I'll then assess next steps. In short, I don't know yet. :)
So, you're not talking about USING or programming these boards yet, you're talking about constructing/fabbing them? Interesting! So, forgive me if I missed it in the video, but why are you going through the trouble to make them? Are they not available as you show them economically online anywhere?
For me, it's an opportunity to learn something new. Moving forward, I hope to do more projects which include FPGA components. An FPGA might be a fun replacement for the glue logic on my 486DX2 build.
I haven't put too much thought into it, yet. The FPGA series that I am using has internal Nonvolatile Configuration Memory which is one-time programmable (so I've been avoiding it). Maybe at some point I'll try another series of FPGAs with better support for on-chip flash. I'd love to work with the Artix-7 FPGAs (on my own PCBs), but PCB manufacturability will be a challenge for me.
0.8 mm pitch BGAs are easily doable with JLCPCB process, I've done quite a bit of them as DDR2/3 actually have pitch of 0.8 mm. I will send you some links later (if I remember to 😊)
send me the links too. The 256 bga part means you could do everything: address decoding, bus steering AND isa bus timing and bus steering all on one chip. You'd basically have to either use 2 144 pin qfp fpgas or make a complicated system of bus transceivers (i.e. exactly what they tell you to do in the 486 hardware reference manual which will be slow and probably cause interference) to make it work otherwise. I have access to machine tools and could probably rig a thingy to perfectly place a bga part on a circuit board if I have to but if there's an easier way I would love to hear about it.
@@scotts-tech I can't post any links here as those comments get removed, but they contained different more powerful FPGA (AMD/Xilinx Spartan-7) in a smaller package (196 ball BGA with 100 user IO pins). If I remember correctly 486 has 64-bit data bus, and so you will probably need even larger package as you will likely want to use some kind of DRAM (for example DDR2, like the board in my link uses, or DDR3). Good thing is that that DDR2/3 memory is going to be plenty fast to share it between CPU and for example GPU implemented inside FPGA. Google for "Custom Spartan-7 FPGA board for beginners", the link should be the very first search result (it should lead to eevblog).
As for power sequencing - it's typically done by connecting "enable" pins of dc-dc converters to "power good" output of converter which is to be turned on before that. Or if you have an MCU on board for some other purposes, you can utilize it for sequencing as well. Though truth be told, many of those FPGAs work just fine if you simply enable all rails at the same time.
Thanks!
I am a new comer in fpga programming using vhdl
It will be easy peasy to make a VGA controller out of this. I've done it in a 128 macrocell CPLD (text mode only but with a hardware cursor) with a 28.322MHz oscillator.
With the amount of logic in this thing you could very likely also support some graphics modes.
A 4mbit RAM has enough room to store a byte per pixel for a 640x480 display (single frame buffer only), but you'll want to do some calculations to see if 15ns will be fast enough to support that kind of resolution and bit depth.
DRAM is easy too. I've used some in a recent project for the first time and with a simple timer and state machine it is trivial to juggle refreshes and accesses.
My other VGA cards are running 55ns, so I hope 15ns will be plenty fast, but I guess I'll see how it goes. I've always enjoyed graphics work, so this should be fun!
@@rehsd yeah, you should be fine. I hadn't done any calculations earlier, but 25.175MHz is about 39ns per clock, so 15ns is plenty fast.
55ns RAM is probably running "out of spec" but it's really a "guaranteed worst case" and could very well just happen to work faster - think of it as over clocking. You wouldn't design a production product around it, at least not without characterising and binning parts based on real world performance rather than manufacturers specs.
I considered using an FPGA for driving a LCD via the parallel bus, but decided against it for the ESP32-S3. They're very cheap and very fast. There's also sample code for driving displays using various protocols. I also looked at the RP2040, but it has some fatal flaws. Flash memory is external only which adds to the BOM costs. Given shortage of the Raspberry PI 4, it's a bit precarious to rely on its availability.
@@TomStorey96 I "upgraded" the PCB to have 1MB of SRAM to give me a little more flexibility (e.g., higher resolution and/or two frames). imgur.com/a/L6otjom
I plan to use that exact sram chip in my build. Be sure to tell us about how it performs when you do get it working. If you're using this to test vga stuff, how are you planning on writing vram data to the ram chip? I have a olimex ice40 dev board with an sram chip but implementing some kind of pseudo spi to parallel ram system sounds like it would be extremely difficult. Maybe a textmode would work well this way.
I'll start with baby steps. 1) Generate proper sync signals, 2) Output simple test patterns that are dynamically generated (no VRAM), 3) Write some test patterns to VRAM from the FPGA and see if I can output it. If I get that far, I'll then assess next steps. In short, I don't know yet. :)
So, you're not talking about USING or programming these boards yet, you're talking about constructing/fabbing them? Interesting! So, forgive me if I missed it in the video, but why are you going through the trouble to make them? Are they not available as you show them economically online anywhere?
For me, it's an opportunity to learn something new. Moving forward, I hope to do more projects which include FPGA components. An FPGA might be a fun replacement for the glue logic on my 486DX2 build.
@@rehsd That makes perfect sense...thanks for posting videos of this progress, there is lots for others to learn here, and I thank you.
I was wondering if you considered removing the flash and using a FPGA variant that has on-chip flash?
I haven't put too much thought into it, yet. The FPGA series that I am using has internal Nonvolatile Configuration Memory which is one-time programmable (so I've been avoiding it). Maybe at some point I'll try another series of FPGAs with better support for on-chip flash. I'd love to work with the Artix-7 FPGAs (on my own PCBs), but PCB manufacturability will be a challenge for me.
0.8 mm pitch BGAs are easily doable with JLCPCB process, I've done quite a bit of them as DDR2/3 actually have pitch of 0.8 mm. I will send you some links later (if I remember to 😊)
I just ordered a couple ICE40HX8K-CT256 BGA chips. :)
@@rehsd I've just sent you an email with some links, Hopefully it will reach you OK.
send me the links too. The 256 bga part means you could do everything: address decoding, bus steering AND isa bus timing and bus steering all on one chip. You'd basically have to either use 2 144 pin qfp fpgas or make a complicated system of bus transceivers (i.e. exactly what they tell you to do in the 486 hardware reference manual which will be slow and probably cause interference) to make it work otherwise. I have access to machine tools and could probably rig a thingy to perfectly place a bga part on a circuit board if I have to but if there's an easier way I would love to hear about it.
@@scotts-tech I can't post any links here as those comments get removed, but they contained different more powerful FPGA (AMD/Xilinx Spartan-7) in a smaller package (196 ball BGA with 100 user IO pins). If I remember correctly 486 has 64-bit data bus, and so you will probably need even larger package as you will likely want to use some kind of DRAM (for example DDR2, like the board in my link uses, or DDR3). Good thing is that that DDR2/3 memory is going to be plenty fast to share it between CPU and for example GPU implemented inside FPGA. Google for "Custom Spartan-7 FPGA board for beginners", the link should be the very first search result (it should lead to eevblog).
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