Creating a Schematic Design for Intel (Altera) FPGAs (Sec 4-4A )

[@BillKleitz]

Hi, This is professor Kleitz. Altera has put the waveform simulator (.vwf) back into the newest release of Quartus II; Hooray!! I recommend that you use Quartus Version 13 or newer for all new projects.

[@vorkvoyd]

IT'S THE GUY WHO WROTE MY BOOK!!!! THAT'S AWESOME!!!

[@yrofot]

Ah.. I got it. Reason for using v9 is explained in the 2nd video. Actually, it was sort-of explained in this video, but it wasn't clear that versions later than v9 didn't have the functionality referenced in the tutorial.

[@0114mercury]

I would like to ask:
In the video it is mentioned that simulation happens AFTER the compilation.
But compilation for FPGA is an expensive operation, it might take several minutes to create a binary code.
In the university labs we were simulating the circuit by using QSYS tool which led to a quick wafeform analysis without having to wait for a long compilation part.
Is that possible here?

[@yrofot]

Useful tutorial for beginners, thanks.
It's interesting that this is with v9 but dated Apr 21 2011. I've just downloaded v11 build 157 (July 2011). Page 4 of 5 in the new project wizard was quite different, I just left all the defaults, so I hope I got it right - guess we'll see soon. I got a whole lot more warnings than Bill did (14). Many of the warnings related to licensing, presumably because I'm using the free version of Quartus. My device is EP2C5T144C8N.

[@MAli-zh6cr]

how to purchase the simulation files? any advise?

[@MrMyutubechannel]

Thanks for the helpful video!

[@666Hitcher666]

Thanks a lot!

[@kumar2501]

thanks Sir it's very useful

[@holsher]

Hello teacher, is good, i am iniciate work with the altera epm7000 famili, possible send my you email for the questions, tankyou.