Wish I had this video when I first started learning FPGA! I did a 1 year Xilinx FPGA internship but never used microblaze so I learned something here too. My team tried to direct me away from using block designs so much and to do everything in TCL and VHDL but it does seem extremely convenient especially if you just want to get to programming in C as soon as possible, Xilinx does have a lot of decent IPs available for free. There is also a very cool community for open sourced FPGA tools and IPs. Looking forward to more high quality FPGA content
@@MatthewHoworko block designs can be harder to integrate into a reproducible project build compared to just using HDL files, you can also see changes in a git history more obviously. However it can be awkward to work with xilinx IP without the block design, and it would be very difficult to work with Zynqs without it.
Thanks for the video! That kind of topic is very rare on YT and a breath of fresh air through the ESP / Arduino tutorials! Would be great to see more videos about FPGA / CPLD and how to choose the right one for the application. In my case, I'm looking to build a welding machine as s side hobby project, just because why not, so now thinking of the right control hardware / sw
Outstanding as always! Every video is *exactly* how I want informative videos to be. Very sharp! Your videos have been boosting my knowledge so much since the first one, I watch them many times to not miss the details. I am a mechanical engineer, also EE enthusiast. Very pleased!
Fascinating! I've always seen FPGAs as black magic, thanks for showing the step-by-step of how to build a working system. I look forward to the next episodes.
Do you plan on making a detailed deep dive video about PICe4 or 5? how that interface works, hardware design, and how to lay it out? would love to learn about it!
I've used both FPGAs and microcontrollers (soft and hard), but I have always wanted to do a design using an FPGA connected to a flexible memory bus controll on a dedicated micro to use the FMC memory space as an extended peripheral region. Could never get approval due to all the unknowns and project schedule time constraints.
Thanks for the video. I would really love a video on why the design process of mid level. How to pick a FPGA? What building block? For example you built this board to some goal, and you choose the FPGA to remove some standard components. What’s the thinking process behind that?
Hello Sir, These videos are priceless for the learners covering Zynq, Microblaze, STM32,Serial interfaces i2c, spi. Can you teach us about the "CAN protocal" next ?🙏
Thanks, Gary - that's a very good question. Judging by CoreMark, a typical 100MHz Microblaze can get around 220ish, whereas an STM32F4 up to ~610, and STM32G4 up to ~570. By the CoreMark metric, the Microblaze is similar to an STM32F1/F3. However, it depends on what the metric is I guess, as the Microblaze can in theory utilise many FPGA resources and offload compute heavy tasks to dedicated 'hard' logic, and so on.
I think it's better for beginners to use I/O planning GUI for creating pin constraints than manually typing them in (and making a bunch of typos in the process). Once you create a diagram, open elaborated design, and I/O planning mode becomes accessible.
Phil have you ever dabbled with Lattice FPGAs? They’re making some neat parts with things like hard MIPI CSI and DSI IP targeted for lower cost IoT devices. Theyre tool (Radiant) is only only 15gb or 10% of Vivado which is also nice
The Lattice stuff looks great and I've been meaning to design a board with one of their parts for some time. Will definitely try to make a little test PCB this year!
Wow. That's an immense amount of granular power. I am looking at my oscilloscope now and wondering what the engineers.packed into the FPGA at the heart of it.
Any thoughts on using enjoy-digital's litex? It seems to support adding various CPUs (Risc-V, OpenRISC,etc) , buses (Etherbone , wishbone, apb3, etc) and even diagnostics like a logic-analyzer (litescope/sigrok).
Hello, very nice video! 👌I am just wondering, when will the video for the Application processor for Embedded Linux will come out? Because it could be helpful for my current project
You mentioned that JLPCB did the assembly for you. Were they able to source the Spartan or did you have to do some gymnastics to get one to them for assembly?
The board was manufactured/assembled by PCBWay, so they did all the part sourcing for me under my instruction (some components, e.g. the Spartan 7 via LCSC).
any chance to make a video of how to control the leds using ethernet connection and sending commands? Also, is there any course of yours for beginner in FPGA?
nice board i am even afraid to ask how much it was in terms of manufacture cost. About how much time did you spend designing this? Also when will the PCBway video come out?
Thank you, Sanji. For two assembled boards, the cost was ~600 USD (incl. PCB, assembly, components, and shipping) - which I actually think is very reasonable. It took me about a week to design this board. PCBWay factory tour will vid I'm gonna start editing next week - so hopefully will be out in June!
May I inquire if there are any templates or alternative platforms where I might find pre-prepared FPGA designs tailored for circuit semantics within Altium software? Additionally, are there any more sophisticated FPGA designs available that do not rely on Vivado templates? I’m wondering if there are any templates or alternative platforms available in Altium software that offer pre-prepared FPGA designs tailored for circuit semantics. Additionally, are there any other FPGA designs that are more sophisticated and do not require Vivado templates? A cordial greeting, thanks for share your knowledge
Vitis uploads the bitstream when we 'flash' our code (via debug or run). I'll make a tutorial on programming the QSPI with the bitstream to then automatically configure the FPGA on boot.
I habe a Problem letting the led blink. The hello world went fine, but when i tried to let the led blink, but it showed an error that the "xpseudo_asm.h"(part of xgpio.h) is missing. I tried regenerating the BSP und updating the drivers for the gpio ip cores but nothing helped so far. I am creating the microblaze on a cmod A7 35 T (Artix 7 eval board) and i am woking with Vivado/Vitis 2023.2 I have written to the Support but no help so far.
Hi Phil, thanks a lot for all your hard work and effort, we truly appreciate it! However, I wanted to ask one question, regarding your courses, is there any specific reason for not publishing them on platforms such as Udemy or even Skillshare, because I (usually) like to keep my library of courses on Udemy for various areas of interests, whether it be PCB or Hardware Design, C/C++ programming, and so on...?
Thank you :) Robert Feranec made a video on reasons for creators not to use Udemy - the reasons are financial. ruclips.net/video/uOQNxRT3upI/видео.html
As of the current state in the video, does the bit stream contain the hello world firmware? Or does it contain only the softcore implementation which means we have to re-run the debugger after bit stream is reloaded every time the board is powered up? Thanks very much for the very nice video
Currently, in this state, you'd need to re-flash the config & application every time the board is powered up. In the next/future video, I'll show how to reconfigure the QSPI flash memory to automatically program the FPGA on start-up.
How did you know which format the configuration commands were used (in the .xdc file)? Eg set_property -dict { PACKAGE_PIN H4 IOSTANDARD LVCMOS33 } [ get_ports {CLK12MHZ}]
There's a couple resources for that: www.xilinx.com/support/documents/sw_manuals/xilinx2022_1/ug903-vivado-using-constraints.pdf Or examining existing constraint files: github.com/digilent/digilent-xdc?_ga=2.87473816.1034821624.1685125896-567247979.1684140552
Great video, thanks :D ... I have two questions. Are You planning to make something with DSP Sharc? What do You think about making traces localy thinner only to fit between two vias? In my design I need to use 145um thick traces to make 50 Ohms but with 0,8mm pitch bga and the smallest vias I can use, sometimes I have to make 92um traces to route because of clearance hole to trace. Does You @Phil's Lab or anyone had similiar situation?
Thank you! I've been meaning to make some Sharc designs, however, the license fee for their software is putting me off. I'm currently working on a larger Artix-7 PCIe/Ethernet/Displayport/... design, as well as an i.MX8M design. Regarding two traces between BGA pads - so far I've never needed to do so, or wanted to do so, as that really drives down the trace width even further. I usually go with 1 trace through each pad pair.
Hello friend, I don't know English. Sorry if something is not clear. I'm from Kazakhstan. Need your help. In practice, I was told to make a power supply board for a poketcube, this is a small spacecraft. I made some boards based on the stm32 microchip. Can you show a video of something similar. Preferably in KiCAD
Hey Phil don't get me wrong, we are in the same business, you are way beter than me. I like your videos. But I am turkish, and i like to share my knowledge like you, but the turkish audience. What should i do? directly start recording some pcb designs, teach some basic arduino raspberry then follow with MCU and SoC? You are more hardware oriented, ı am msc. computer engineer and i do almost all software stuff. Is there any recommendation for me from a professional like you?
As always thanks for the videos and great content. As I’ve stated before, I am new to all this however, I am a quick study. That being said, would you mind if I emailed you to lay out my argument for letting me enroll in your advanced design course? I don’t like to fail at things especially if there are fee’s involved. Lol. I know you’re super busy, so respond only when convenient. Also, you wouldn’t happen to be the Phil that I’ve seen demonstrating a new recording studio application?? The demo of an audio remix was amazing. If not you, you should check it out. If it is you, your talents are other worldly. Thanks for taking the time. -Jason
more FPGA/ZYNQ, please. You`re awesome!
Thanks, Oleksiy - much more to come!
@@PhilsLab with FIFO and flow controls and PCIE bus )
@@PhilsLab your videos are like steroids to my embedded life 😎
Thank you so much for your videos. I always got overwhelmed whenever I wanted to enter the microblaze arena but your video was so easy to follow.
Thank you, Wahid - I'm glad to hear that!
Wish I had this video when I first started learning FPGA! I did a 1 year Xilinx FPGA internship but never used microblaze so I learned something here too. My team tried to direct me away from using block designs so much and to do everything in TCL and VHDL but it does seem extremely convenient especially if you just want to get to programming in C as soon as possible, Xilinx does have a lot of decent IPs available for free. There is also a very cool community for open sourced FPGA tools and IPs.
Looking forward to more high quality FPGA content
Did they give any reasons for not using block designs?
@@MatthewHoworko block designs can be harder to integrate into a reproducible project build compared to just using HDL files, you can also see changes in a git history more obviously. However it can be awkward to work with xilinx IP without the block design, and it would be very difficult to work with Zynqs without it.
Thanks for the video! That kind of topic is very rare on YT and a breath of fresh air through the ESP / Arduino tutorials!
Would be great to see more videos about FPGA / CPLD and how to choose the right one for the application.
In my case, I'm looking to build a welding machine as s side hobby project, just because why not, so now thinking of the right control hardware / sw
Thank you very much, Vlad! There will be quite a few more FPGA videos to come.
@Phil's Lab: Always good to see your work videos. very very interesting.
Thank you, Shakaib!
I am planning to start new project for audio processing on STM32. This video came right on time now I will definitely consider using FPGA.
Glad to hear the timing's right - good luck with your project!
Outstanding as always! Every video is *exactly* how I want informative videos to be. Very sharp! Your videos have been boosting my knowledge so much since the first one, I watch them many times to not miss the details. I am a mechanical engineer, also EE enthusiast. Very pleased!
Thank you very much for your kind comment, Igor!
Pretty smart JTAG header arrangement. No need to install headers!
Fascinating! I've always seen FPGAs as black magic, thanks for showing the step-by-step of how to build a working system. I look forward to the next episodes.
Thanks a lot, Mike!
You nailed it. Such a good lecturer!! Congrats.
Thank you, Mohamed!
Looking up to your future videos, not to forget the UART JTAG section.
Very cool stuff my dude! Love it.
Thank you, Mikkel!
Thank you for the video! This one was super interesting. 🤓
Thanks, Lucas - I'm glad you liked it!
Do you plan on making a detailed deep dive video about PICe4 or 5? how that interface works, hardware design, and how to lay it out? would love to learn about it!
excellent video - I like doing all from scratch - helps most to follow up all. Like more FPGA videos also Zync.
Vielen Dank, Herr Klein :) More videos to come.
Awesome, Thanks.
I've used both FPGAs and microcontrollers (soft and hard), but I have always wanted to do a design using an FPGA connected to a flexible memory bus controll on a dedicated micro to use the FMC memory space as an extended peripheral region. Could never get approval due to all the unknowns and project schedule time constraints.
That's a very cool idea! I would be interested to hear how you implement that, should you get around to that at some point.
Thanks for the video. I would really love a video on why the design process of mid level. How to pick a FPGA? What building block? For example you built this board to some goal, and you choose the FPGA to remove some standard components. What’s the thinking process behind that?
That's a great idea for a video, thank you - I'll be sure to make one about that in the near future!
Very good
Hello Sir, These videos are priceless for the learners covering Zynq, Microblaze, STM32,Serial interfaces i2c, spi. Can you teach us about the "CAN protocal" next ?🙏
Phil, Thank you so much. Great presentation. How does the speed of the MicroBlaze compare to an STM32F4 or G4 MCU?
Thanks, Gary - that's a very good question. Judging by CoreMark, a typical 100MHz Microblaze can get around 220ish, whereas an STM32F4 up to ~610, and STM32G4 up to ~570.
By the CoreMark metric, the Microblaze is similar to an STM32F1/F3.
However, it depends on what the metric is I guess, as the Microblaze can in theory utilise many FPGA resources and offload compute heavy tasks to dedicated 'hard' logic, and so on.
I think it's better for beginners to use I/O planning GUI for creating pin constraints than manually typing them in (and making a bunch of typos in the process). Once you create a diagram, open elaborated design, and I/O planning mode becomes accessible.
Are we gonna get the full Xerxes hardware build for 2024? Excited to see that!
Legend!
Thanks, Patty!
it was amazing
Thank you!
Phil have you ever dabbled with Lattice FPGAs? They’re making some neat parts with things like hard MIPI CSI and DSI IP targeted for lower cost IoT devices. Theyre tool (Radiant) is only only 15gb or 10% of Vivado which is also nice
The Lattice stuff looks great and I've been meaning to design a board with one of their parts for some time. Will definitely try to make a little test PCB this year!
@@PhilsLab ive been using them for about a year at work and think they’re great
Can you make video on Multiboot and fall back. How to create the necessary settings in vivado/Vitis?
Wow. That's an immense amount of granular power. I am looking at my oscilloscope now and wondering what the engineers.packed into the FPGA at the heart of it.
Any thoughts on using enjoy-digital's litex? It seems to support adding various CPUs (Risc-V, OpenRISC,etc) , buses (Etherbone , wishbone, apb3, etc) and even diagnostics like a logic-analyzer (litescope/sigrok).
Hello, very nice video! 👌I am just wondering, when will the video for the Application processor for Embedded Linux will come out? Because it could be helpful for my current project
Wow! I had no clue HDL abstraction was a thing.
For a future, could you please let us know how much FPGA resources your examples require, sir?
Amazing!! It would be nice a video about image processing using fpga... I dont find tutorials on it anywhere
Thank you, Matheus! I currently don't have a board made that can handle that, but will be designing something like that in the future.
@@PhilsLab...and FFT/IFFT in parallel please -)
❤❤❤ ilove it thanks 🤩🤩
Thank you :)
You mentioned that JLPCB did the assembly for you. Were they able to source the Spartan or did you have to do some gymnastics to get one to them for assembly?
The board was manufactured/assembled by PCBWay, so they did all the part sourcing for me under my instruction (some components, e.g. the Spartan 7 via LCSC).
Very nice intro! Could you make a similar intro using LiteX and a RISC-V core?
Thank you! I'm afraid I'm gonna do some HDL/other tutorials first. Maybe at some point in the future.
any chance to make a video of how to control the leds using ethernet connection and sending commands?
Also, is there any course of yours for beginner in FPGA?
nice board i am even afraid to ask how much it was in terms of manufacture cost.
About how much time did you spend designing this? Also when will the PCBway video come out?
Thank you, Sanji. For two assembled boards, the cost was ~600 USD (incl. PCB, assembly, components, and shipping) - which I actually think is very reasonable. It took me about a week to design this board.
PCBWay factory tour will vid I'm gonna start editing next week - so hopefully will be out in June!
@@PhilsLab THX often my pcb project are like less then 30-50$ including PCBA but i guess at some point the cost balloons especially for L6-8
May I inquire if there are any templates or alternative platforms where I might find pre-prepared FPGA designs tailored for circuit semantics within Altium software? Additionally, are there any more sophisticated FPGA designs available that do not rely on Vivado templates? I’m wondering if there are any templates or alternative platforms available in Altium software that offer pre-prepared FPGA designs tailored for circuit semantics. Additionally, are there any other FPGA designs that are more sophisticated and do not require Vivado templates? A cordial greeting, thanks for share your knowledge
Obfuscated serial number on your FPGA, what‘s going on there?
If I want to debug my ip in block diagram, how can I simulate this block diagram to view waveform?
what about pld?....
You didn't show or mention uploading the Bitstream to the FPGA. Does Vitis also upload the Bitstream to the FPGA on its own?
Vitis uploads the bitstream when we 'flash' our code (via debug or run). I'll make a tutorial on programming the QSPI with the bitstream to then automatically configure the FPGA on boot.
I habe a Problem letting the led blink. The hello world went fine, but when i tried to let the led blink, but it showed an error that the "xpseudo_asm.h"(part of xgpio.h) is missing.
I tried regenerating the BSP und updating the drivers for the gpio ip cores but nothing helped so far.
I am creating the microblaze on a cmod A7 35 T (Artix 7 eval board) and i am woking with Vivado/Vitis 2023.2
I have written to the Support but no help so far.
Hi Phil, thanks a lot for all your hard work and effort, we truly appreciate it!
However, I wanted to ask one question, regarding your courses, is there any specific reason for not publishing them on platforms such as Udemy or even Skillshare, because I (usually) like to keep my library of courses on Udemy for various areas of interests, whether it be PCB or Hardware Design, C/C++ programming, and so on...?
Thank you :)
Robert Feranec made a video on reasons for creators not to use Udemy - the reasons are financial. ruclips.net/video/uOQNxRT3upI/видео.html
As of the current state in the video, does the bit stream contain the hello world firmware? Or does it contain only the softcore implementation which means
we have to re-run the debugger after bit stream is reloaded every time the board is powered up? Thanks very much for the very nice video
Currently, in this state, you'd need to re-flash the config & application every time the board is powered up. In the next/future video, I'll show how to reconfigure the QSPI flash memory to automatically program the FPGA on start-up.
what are those big blocks on the pcb near the usb c
Those are the 1/4 inch audio jacks.
How did you know which format the configuration commands were used (in the .xdc file)? Eg set_property -dict { PACKAGE_PIN H4 IOSTANDARD LVCMOS33 } [ get_ports {CLK12MHZ}]
There's a couple resources for that: www.xilinx.com/support/documents/sw_manuals/xilinx2022_1/ug903-vivado-using-constraints.pdf
Or examining existing constraint files: github.com/digilent/digilent-xdc?_ga=2.87473816.1034821624.1685125896-567247979.1684140552
@@PhilsLab Perfect. Thank you very much.
Nice video Phil! Can I ask you how you make the board diagram?
0:56 he uses Altium designer
Thank you, Jakub - for the block diagram I used draw.io (free).
Great video, thanks :D ... I have two questions. Are You planning to make something with DSP Sharc? What do You think about making traces localy thinner only to fit between two vias? In my design I need to use 145um thick traces to make 50 Ohms but with 0,8mm pitch bga and the smallest vias I can use, sometimes I have to make 92um traces to route because of clearance hole to trace. Does You @Phil's Lab or anyone had similiar situation?
Thank you! I've been meaning to make some Sharc designs, however, the license fee for their software is putting me off. I'm currently working on a larger Artix-7 PCIe/Ethernet/Displayport/... design, as well as an i.MX8M design.
Regarding two traces between BGA pads - so far I've never needed to do so, or wanted to do so, as that really drives down the trace width even further. I usually go with 1 trace through each pad pair.
hello bro, i would like to design my own usb adio interface (8ch i/o as minimum, digital and analoge i/o), which of your couses are useful for me?
Hello friend, I don't know English. Sorry if something is not clear. I'm from Kazakhstan. Need your help. In practice, I was told to make a power supply board for a poketcube, this is a small spacecraft. I made some boards based on the stm32 microchip. Can you show a video of something similar. Preferably in KiCAD
I will wait for an answer
XERXES ! how did you come up with this name ? i love history
Given the FPGA's name of 'Spartan', that immediately made me think of the film '300'. With Xerxes being a part of that :D
can you share the files?
Where I could buy this Xerxes board?
I'm afraid it's not for sale (at the moment).
Why?
I wish altium had a hobiest version and not $500 a month for tinkering
Hey Phil don't get me wrong, we are in the same business, you are way beter than me. I like your videos. But I am turkish, and i like to share my knowledge like you, but the turkish audience. What should i do? directly start recording some pcb designs, teach some basic arduino raspberry then follow with MCU and SoC? You are more hardware oriented, ı am msc. computer engineer and i do almost all software stuff. Is there any recommendation for me from a professional like you?
As always thanks for the videos and great content. As I’ve stated before, I am new to all this however, I am a quick study. That being said, would you mind if I emailed you to lay out my argument for letting me enroll in your advanced design course? I don’t like to fail at things especially if there are fee’s involved. Lol.
I know you’re super busy, so respond only when convenient. Also, you wouldn’t happen to be the Phil that I’ve seen demonstrating a new recording studio application?? The demo of an audio remix was amazing. If not you, you should check it out. If it is you, your talents are other worldly. Thanks for taking the time. -Jason
Please.."RISCV on FPGA"
👍🙏❤️
Mate, all the software that you’re using is only available for windows. It’s is time for an upgrade to a better platform 😂