As someone who has designed Thunderbolt and USB 3.0 peripherals and has purchased two full Altium licenses, I applaud your clear and expertly presented content. I wish your videos existed 20 years ago. You are an asset to the engineering community.
@@PhilsLab The high frequency model of resistor shows that resistor has parasitic capacitance and inductance. The high frequency model of capacitor shows that it has parasitic inductance and resistance. Do the paraisitics of the components used for termination of high speed signals matter at all?
@@優さん-n7m ... and the high freq model of a chip inductor shows it has parasitic resistance and capacitance. So basically, at high frequency we only get one kind of component, a combo RLC. Greatly simplifies inventory.
Hi Phil, At 14:45 you used the Altium layer stack manager to determine the width of a 50 ohm trace to be 0.3mm. I thought that sounded pretty large for the dielectric thicknesses you typically usually use in your projects. Looking in detail at the layer stack manager, it looks like you selected a 0.075mm (3mils) dielectric thickness between layers 1 and 2, which seemed reasonable, but it looks like you used a dielectric constant of "1" for that dielectric, which is the dielectric constant for air! You got the 50ohm trace you wanted from a simulation perspective, but that seemed like a strange way to do it.
Question. I'm struggling to understand the blue line on the graph in the "series termination"section, around 8:40. Why does the driver output "hold" at about 0.5v for a short duration? I would expect the driver to output the full 1v signal, but the load to only receive the full voltage after the reflections add together. What is making the driver "pause" like this?
Hey Phil, great video! Got to learn a lot. I have a genuine question, where do you get to learn and apply these skills? As in most of the universities esp. at the undergraduate level don't even touch PCB Design. Which companies/industry do you work in to practice this?
I'm self-employed so I get to work on a variety of projects. However, a lot of my learning takes place in my own time, where I'm trying to find new topics to deepen my understanding, improve my skills, etc..
Nice content. I have a question. Does the signal transmission direction affect the termination resistor placement? For example, for MISO and MOSI lines, does the resistor need to be placed closed to the transmission source if it’s chip to chip communication?
Thanks! Yes, as stated in the video, place the resistor as close as possible to the driver/transmitter (e.g. at S for MISO, or M for MOSI - for point-to-point connections).
Great video! How do you verify your series termination resistor has the fairly right value? Probing with a scope disrupt the transmission line so how do I know? Probing rf emission with near field probe?
No. If you're talking about a resistor at the output of an op amp stage (and not included in the feedback loop) the purpose of that resistor is to reduce the effect of a capacitive load introducing an unwanted phase shift into the op amp stage feedback loop. The negative feedback loop is first a way to set the gain of the op amp stage to something useful, like 10. The open-loop op amp has a gain of say 1 million at DC, and there's built-in "compensation", which gradually decreases the gain vs frequency to 1 at some high frequency. This is because at some high frequency, the delay in the op amp starts to look like one half wave cycle time, so that the total feedback around your "negative feedback loop" ends up being positive. That is, the feedback arriving at the negative op amp terminal is in phase with the input signal. So the op amp is designed to have gain less than one at that frequency to avoid oscillation. But if you attach a capacitive load directly to the op amp output, that increases delay around the loop, and can result in reaching the positive feedback condition at a lower frequency where op amp gain is still >1, and oscillation results. So the series output resistor helps to reduce the delay effect of a capacitive load on the op amp output.
Very interesting topic! Thinking about this though, there is one thing that makes me not like this solution.. I fully agree that if your Zsource+Zterm=Zline and Zload>>Zline you will get a nice signal at the load of the same amplitude as the voltage the driver is driven from, but you still have one reflection traveling back down the line - until it meets Zterm. What I'm trying to say is that if you would have a parallel termination, that would remove the reflection but it would also reduce the amplitude of the signal at the load; the parallel termination seems to be better for EMI but the series one seems to be better for signal-integrity
As a user of analog video back in the 70s and 80s, I'm well familiar with termination resistors. But I'd be interested in seeing a tutorial on termination vs frequency. Old style analog video is ~ 5 MHz, and requires termination. What about audio signals? or even sub-audible signals (LFO) ?
A place to start thinking about this is comparing the wavelength (on a wire) of the highest frequency of interest versus the length of cable involved. Assuming audio max freq is 20kHz, wavelength in vacuum would be 300 M meters/20k = 15 km. Let's say on a wire the velocity is only c/2, so that's 7.5km. One rule of thumb is to start worrying about reflections if the length of wire exceeds 1/10 wavelength. So, if your wiring exceeds 750m, you could think about termination to address reflections -- so mostly not an issue. At 5MHz, vacuum wavelength would be 60m, so let's say 40m on coax. So termination starts being useful at 4m.
I can never remember if the series resistor goes near the transmitter or the receiver. I recently put a series termination resistor on a Neopixel strip at the end of a ~1 meter long wire, to alleviate some sporadic behavior I was seeing. Of course I put the resistor on the receiving end of the wire, and I've noticed that the sporadic behavior is reduced but still present. I'll have to go back and fix it properly. Hopefully that experience and this video will make me remember next time!
Yes, but then the terminology is more towards 'matching', e.g. for RF designs - trying to match impedances to minimise reflections, but then to maximise power transfer. Also, loosely speaking, AC parallel termination can be seen as 'complex termination'.
As someone who has designed Thunderbolt and USB 3.0 peripherals and has purchased two full Altium licenses, I applaud your clear and expertly presented content. I wish your videos existed 20 years ago. You are an asset to the engineering community.
Thank you very much for your kind comment, Peter!
@@PhilsLab
The high frequency model of resistor shows that resistor has parasitic capacitance and inductance.
The high frequency model of capacitor shows that it has parasitic inductance and resistance.
Do the paraisitics of the components used for termination of high speed signals matter at all?
@@優さん-n7m Yes they do, along with the land pattern of the component itself and if reference plane is voided below the pads or not.
@@優さん-n7m ... and the high freq model of a chip inductor shows it has parasitic resistance and capacitance. So basically, at high frequency we only get one kind of component, a combo RLC. Greatly simplifies inventory.
Absolutely gem. I like the clarity in which you explain with all the reasoning putting practicality in place.
Thanks a lot!
Every video is just great. Timely for what I work on, and great references for school and for work applications. So thankful to be a subscriber.
Thank you very much!
That is the real value of the Internet - great knowledge is shared among everyone who needs it
wtf how? i am literally in the process of researching this topic for an emi presentation i have to give. awesome timing, much appreciated :D
Awesome, glad to hear that - good luck with your presentation, Julian! :)
Hi Phil, At 14:45 you used the Altium layer stack manager to determine the width of a 50 ohm trace to be 0.3mm. I thought that sounded pretty large for the dielectric thicknesses you typically usually use in your projects. Looking in detail at the layer stack manager, it looks like you selected a 0.075mm (3mils) dielectric thickness between layers 1 and 2, which seemed reasonable, but it looks like you used a dielectric constant of "1" for that dielectric, which is the dielectric constant for air! You got the 50ohm trace you wanted from a simulation perspective, but that seemed like a strange way to do it.
Question. I'm struggling to understand the blue line on the graph in the "series termination"section, around 8:40. Why does the driver output "hold" at about 0.5v for a short duration? I would expect the driver to output the full 1v signal, but the load to only receive the full voltage after the reflections add together. What is making the driver "pause" like this?
This is after the series termination resistor at the driver side (due to the potential divider 'effect' together with the transmission line).
Very clear explanation, Phil. Thanks!
Thank you!
Another very clear explanation. Thank you.
Thank you!
Very clear, thank you mr.philip.
Thank you!
Hey Phil, great video! Got to learn a lot.
I have a genuine question, where do you get to learn and apply these skills? As in most of the universities esp. at the undergraduate level don't even touch PCB Design. Which companies/industry do you work in to practice this?
I'm self-employed so I get to work on a variety of projects. However, a lot of my learning takes place in my own time, where I'm trying to find new topics to deepen my understanding, improve my skills, etc..
Nice content.
I have a question. Does the signal transmission direction affect the termination resistor placement? For example, for MISO and MOSI lines, does the resistor need to be placed closed to the transmission source if it’s chip to chip communication?
Thanks!
Yes, as stated in the video, place the resistor as close as possible to the driver/transmitter (e.g. at S for MISO, or M for MOSI - for point-to-point connections).
@@PhilsLab Thanks!
I applaud your efforts. I was wondering, how do you push through to complete your design when you get stuck? Is there a specific methodology, you use?
Thanks! Getting stuck in what sense?
@@PhilsLab I was thinking BGA fanout for example or DDR routing.
Great video!
How do you verify your series termination resistor has the fairly right value?
Probing with a scope disrupt the transmission line so how do I know? Probing rf emission with near field probe?
How to properly terminate multi-point SPI bus? Is parallel termination the best and only solution?
Thank u Sir.
Just to clarify, can I use series and parallel termination at the same line? Series on Tx and parallel or Rx?
Not something I've seen before to be honest.
Is the reflection explaination here the same reason audio frequency opamps can require buffer resistors for stability?
No. If you're talking about a resistor at the output of an op amp stage (and not included in the feedback loop) the purpose of that resistor is to reduce the effect of a capacitive load introducing an unwanted phase shift into the op amp stage feedback loop. The negative feedback loop is first a way to set the gain of the op amp stage to something useful, like 10. The open-loop op amp has a gain of say 1 million at DC, and there's built-in "compensation", which gradually decreases the gain vs frequency to 1 at some high frequency. This is because at some high frequency, the delay in the op amp starts to look like one half wave cycle time, so that the total feedback around your "negative feedback loop" ends up being positive. That is, the feedback arriving at the negative op amp terminal is in phase with the input signal. So the op amp is designed to have gain less than one at that frequency to avoid oscillation. But if you attach a capacitive load directly to the op amp output, that increases delay around the loop, and can result in reaching the positive feedback condition at a lower frequency where op amp gain is still >1, and oscillation results. So the series output resistor helps to reduce the delay effect of a capacitive load on the op amp output.
Great job! Can you also tell us about the pcie bus? Separation capacitors are used there . Why are they put there?
Thanks! Yes, that'll be a topic for a future video :)
when the series termination resistor pads are bigger than trace then will this work effectively?
It's very clear on voltage driver. Is there possible to have current source driver tutorial?
Is there any use on combining series and parallel termination on the same line?
Haven't really seen that before.
Do you publically share any of the boards that you make? I checked on your site and didn't see any there.
Some of the boards are on Git. Working on integrating some designs on the site with an Altium web viewer.
Very interesting topic! Thinking about this though, there is one thing that makes me not like this solution.. I fully agree that if your Zsource+Zterm=Zline and Zload>>Zline you will get a nice signal at the load of the same amplitude as the voltage the driver is driven from, but you still have one reflection traveling back down the line - until it meets Zterm. What I'm trying to say is that if you would have a parallel termination, that would remove the reflection but it would also reduce the amplitude of the signal at the load; the parallel termination seems to be better for EMI but the series one seems to be better for signal-integrity
And what happens when you use a combination of both methods?
This is also sometimes called "back termination."
As a user of analog video back in the 70s and 80s, I'm well familiar with termination resistors. But I'd be interested in seeing a tutorial on termination vs frequency. Old style analog video is ~ 5 MHz, and requires termination. What about audio signals? or even sub-audible signals (LFO) ?
A place to start thinking about this is comparing the wavelength (on a wire) of the highest frequency of interest versus the length of cable involved. Assuming audio max freq is 20kHz, wavelength in vacuum would be 300 M meters/20k = 15 km. Let's say on a wire the velocity is only c/2, so that's 7.5km. One rule of thumb is to start worrying about reflections if the length of wire exceeds 1/10 wavelength. So, if your wiring exceeds 750m, you could think about termination to address reflections -- so mostly not an issue. At 5MHz, vacuum wavelength would be 60m, so let's say 40m on coax. So termination starts being useful at 4m.
I can never remember if the series resistor goes near the transmitter or the receiver. I recently put a series termination resistor on a Neopixel strip at the end of a ~1 meter long wire, to alleviate some sporadic behavior I was seeing. Of course I put the resistor on the receiving end of the wire, and I've noticed that the sporadic behavior is reduced but still present. I'll have to go back and fix it properly. Hopefully that experience and this video will make me remember next time!
Interesting that the series resistor (I assume a small value in comparison to the load impedance) at the receiving end still had a noticeable impact!
Separate comment, for a question: what do you use for making slides? PowerPoint? Beamer?
PowerPoint with figures made with draw.io
Are there also applications with complex impedances required for termination?
When will this be the case?
Yes, but then the terminology is more towards 'matching', e.g. for RF designs - trying to match impedances to minimise reflections, but then to maximise power transfer. Also, loosely speaking, AC parallel termination can be seen as 'complex termination'.
Thank you
👍🙏❤
Anyone looking for complete details on this subject,
Check out the resources created by Dr Howard Johnson and Eric Bogatin.