@@ritukapurclasses1591 I have my exam tomorrow, please, help. There is a possible question that I could not answer: "In which cases the RAW dependency can not be solved with forwarding?" Mention the technique you would use to solve it.
I have my exam tomorrow, please, help. There is a possible question that I could not answer: "In which cases the RAW dependency can not be solved with forwarding?" Mention the technique you would use to solve it.
in write back stage (WB) the result is written in cache/Main memory. So I guess the pipeline will be stalled upto the execution phase. as after that execution phase the result should be in the register. So during the WB stage of I1, Execution stage of I2 should start
I have my exam tomorrow, please, help. There is a possible question that I could not answer: "In which cases the RAW dependency can not be solved with forwarding?" Mention the technique you would use to solve it.
Thanks... Yes I have prepared the entire list of other hazards and will be continuing to upload the same in the following days... Stay tuned (Make sure u hv clicked the notification icon) ...
I have my exam tomorrow, please, help. There is a possible question that I could not answer: "In which cases the RAW dependency can not be solved with forwarding?" Mention the technique you would use to solve it.
Please can you explain the all the remaining hazards my exams are near so please explain it as soon as you can. If you have already explained then give me link because i didn't get it on your channel.
I have my exam tomorrow, please, help. There is a possible question that I could not answer: "In which cases the RAW dependency can not be solved with forwarding?" Mention the technique you would use to solve it.
I have my exam tomorrow, please, help. There is a possible question that I could not answer: "In which cases the RAW dependency can not be solved with forwarding?" Mention the technique you would use to solve it.
I have my exam tomorrow, please, help. There is a possible question that I could not answer: "In which cases the RAW dependency can not be solved with forwarding?" Mention the technique you would use to solve it.
Your logic of operand forwarding is absolutely and wholly wrong. Actually in operand forwarding the opcode fetch operations takes place in the same clock cycle in which the execute of previous instruction ends. Thank u.
Hello Savez... Since there are a number of sources posting solutions to GATE questions, you should always try to verify the concept from a recognized source (viz. either a good text book or Wikipedia). Here's the link to Wiki page of the concept: en.wikipedia.org/wiki/Hazard_(computer_architecture)#Operand_forwarding. I would like to draw your attention to the lines " there is no wait to commit/store the output of i1 in Register 1". It never said there was no need to wait for execution phase to complete. Further, they state that "and the new value of Register 1 (in this example, this value is 3) which is sent from the next stage Instruction Execute/Memory Access (EX/MEM)", and you would be knowing that a stage can never produce anything before completing itself (i.e. stages are taken as atomic). So, this means when we are considering the Operand Fetch phase we need to wait for the execution of previous to complete. Further, in many books or different web sources, people consider the Operand Fetch phase merged with the Execution phase. The time-sequence diagram would be different for such a case. All the very best for your preparation :)
@@ritukapurclasses1591 I have my exam tomorrow, please, help. There is a possible question that I could not answer: "In which cases the RAW dependency can not be solved with forwarding?" Mention the technique you would use to solve it.
mam actually you have done very good job in the above video please never stop it. you are helping countless students
Thank you... Means a lot...
@@ritukapurclasses1591 I have my exam tomorrow, please, help.
There is a possible question that I could not answer: "In which cases the RAW dependency can not be solved with forwarding?" Mention the technique you would use to solve it.
the earth shook when she said HAZAAAARDs
Your handwriting is very very good and way of teaching also very good.
Hey, you have a very good teaching style..ur contents on any topic is optimal & tats perfect.. I'm enjoying it & watching video in or order of SRTF😁
Ur explanation helped me a lot ❤️thank you
Helpful video..... Never Quit
Excelente video !
Nice maam❤️
Add videos on tomosulo algorithm, cache coherence , dynamic branch prediction vector architecture
Mam your voice.... Sooo sweet seriously :*
I have my exam tomorrow, please, help.
There is a possible question that I could not answer: "In which cases the RAW dependency can not be solved with forwarding?" Mention the technique you would use to solve it.
Mam i have a semester exam please upload more video on this subject
Can you please upload the pdf files of all pages shown in this and other videos? That will be very helpful while studying night before exam 😃.
I'll try...
@@ritukapurclasses1591 please maam
Thank you very much..You nailed it explaining❤️
Thank you... More videos coming up on d same topic... Stay tuned...
in write back stage (WB) the result is written in cache/Main memory. So I guess the pipeline will be stalled upto the execution phase. as after that execution phase the result should be in the register. So during the WB stage of I1, Execution stage of I2 should start
Thank you sis
Thank you!!
Thanks
Great explanation
I have my exam tomorrow, please, help.
There is a possible question that I could not answer: "In which cases the RAW dependency can not be solved with forwarding?" Mention the technique you would use to solve it.
@Dhruv Das
Sorry i cant understand your language
i think in forwarding there would be no delay
Just perfect
I think there is little problem with this datapath diagram. The stage Memory Access is not depicted here which is actually indispensable.
thank you madam
Are you a gate qualifier?
Yes I am 5 times gate qualified. It's mentioned in the channel info.
@@ritukapurclasses1591 Really...You just said r1 is subtracted from r6 but its reverse...and trying to show off..lol
your voice is charming
It's really helpfull...thanks a lot.Can you please upload more videos on pipelining...
Thanks... Yes I have prepared the entire list of other hazards and will be continuing to upload the same in the following days... Stay tuned (Make sure u hv clicked the notification icon) ...
mam you done a great job keep doing it ,,really helpfull video
I have my exam tomorrow, please, help.
There is a possible question that I could not answer: "In which cases the RAW dependency can not be solved with forwarding?" Mention the technique you would use to solve it.
Madam which book should I follow for GATE computer organisation and architecture?
Patterson is a good book...
Voice 😍😍😍😍
your voice is love
Add r1+r 2 & store in r3 I think this is right. It's in my text book
In Drex Language R2+R3 is stored in R1.
Have some breaks while u talk, good explanation, but u r much faster
Nice explain...Ritu can you explain Syntex Directed Translation in compiler.. Its very urgent. :)
+The Celebrity Sure.. I'll post it as the next video...
Ritu Kapur Classes thank so much.. GATE is near.that's y :(
+The Celebrity I'hv recorded it... Should be online by tomorrow...
Ritu Kapur Classes ohhh thank you ....thank you... It means a lot. God bless you
Thank you mam 😊
Please can you explain the all the remaining hazards my exams are near so please explain it as soon as you can.
If you have already explained then give me link because i didn't get it on your channel.
Sure... I'll put it by this weekend...
Thanks fr bringing it into my notice... I'll post it by this week...
ma'am I too require the other hazards as well as methods of handling them...thanks a lot for your lectures
mam my exam is in next week,plz upload the video of the remaining hazards.
Please do give a video on identifying the pipeline hazard..
It seems like you are explaining yourself
great video but your hazaard is funny
I have my exam tomorrow, please, help.
There is a possible question that I could not answer: "In which cases the RAW dependency can not be solved with forwarding?" Mention the technique you would use to solve it.
I have my exam tomorrow, please, help.
There is a possible question that I could not answer: "In which cases the RAW dependency can not be solved with forwarding?" Mention the technique you would use to solve it.
In case operand fowarding technique cannot be used, you can use the delay the pipe approach
@@ritukapurclasses1591
Thanks.
Yes, but in which cases? How i know when i can not use FORWARDING for a RAW dependence?
lol my exam is in 20 minutes xD
I have my exam tomorrow, please, help.
There is a possible question that I could not answer: "In which cases the RAW dependency can not be solved with forwarding?" Mention the technique you would use to solve it.
your voice amazing
Damn no breaks after teaching one particular sentence, why so much fast??
Bcoz she did blind memorization
Is tis dynamic scheduling
can you upload numerical on throughput..urgent..Tomorrow Sem-end exam is there..
1:51 mam bahadur whistle bja rha hai :-)
hahahaha
Your logic of operand forwarding is absolutely and wholly wrong. Actually in operand forwarding the opcode fetch operations takes place in the same clock cycle in which the execute of previous instruction ends. Thank u.
Hello Savez... Since there are a number of sources posting solutions to GATE questions, you should always try to verify the concept from a recognized source (viz. either a good text book or Wikipedia). Here's the link to Wiki page of the concept: en.wikipedia.org/wiki/Hazard_(computer_architecture)#Operand_forwarding. I would like to draw your attention to the lines " there is no wait to commit/store the output of i1 in Register 1". It never said there was no need to wait for execution phase to complete. Further, they state that "and the new value of Register 1 (in this example, this value is 3) which is sent from the next stage Instruction Execute/Memory Access (EX/MEM)", and you would be knowing that a stage can never produce anything before completing itself (i.e. stages are taken as atomic). So, this means when we are considering the Operand Fetch phase we need to wait for the execution of previous to complete. Further, in many books or different web sources, people consider the Operand Fetch phase merged with the Execution phase. The time-sequence diagram would be different for such a case. All the very best for your preparation :)
@@ritukapurclasses1591 I have my exam tomorrow, please, help.
There is a possible question that I could not answer: "In which cases the RAW dependency can not be solved with forwarding?" Mention the technique you would use to solve it.
Not a good explanation....